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PDF AKD4103A-B Data sheet ( Hoja de datos )
| Número de pieza | AKD4103A-B | |
| Descripción | AK4103A Evaluation Board Rev.0 | |
| Fabricantes | Asahi Kasei Microsystems | |
| Logotipo |  |
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ASAHI KASEI
[AKD4103A-B]
AKD4103A-B
AK4103A Evaluation Board Rev.0
GENERAL DESCRIPTION
The AKD4103A-B is an evaluation board for the AK4103A, 192kHz DIT. The AKD4103A-B has the
interface with AKM’s A/D converter evaluation boards and AKM’s DIR evaluation boards. Therefore, it is
easy to evaluate the AK4103A. The AKD4103A-B also has the digital audio interface and can achieve the
interface with digital audio systems via optical link, BNC unbalance or XLR balance connector.
Ordering guide
AKD4103A-B --- Evaluation board for AK4103A
(A cable for connecting with printer port of IBM-AT compatible PC and a control
software are packed with this. The control software does not operate on Windows
NT.)
FUNCTION
Digital interface
Compatible with 2 types of interface
- Direct interface with AKM’s ADC, DIR evaluation boards by 10pin header
- Optical/BNC/XLR output
Serial control data I/F
- 1 input/output port (10-pin port)
5V GND
Control
Opt
TX
AK4103A
C,U,V
Serial Data in
(For DIT)
Figure 1. AKD4103A-B Block Diagram
*Circuit diagram and PCB layout are attached at the end of this manual.
<KM076800>
-1-
2004/11
1 page  
ASAHI KASEI
[AKD4103A-B]
Toggle switch set-up
SW2 PDN
Reset switch for AK4103A. Set to “H” during normal operation. Bring to “L” once after
the power is supplied.
DIP switch (SW1) set-up: -off- means “L”
No. Switch Name
Function
1 IPS0
Don’t care
2 DIF0
Set-up of DIF0 pin. (in synchronous mode)
3 DIF1
Set-up of DIF1 pin. (in synchronous mode)
4 DIF2
Set-up of DIF2 pin. (in synchronous mode)
5 IPS1/IIC
6 ANS
Don’t care
Set-up of ANS pin. “L”: asynchronous mode, “H”: synchronous mode
7 TEST
Don’t care
8 ACKS
Don’t care
Default
OFF
OFF
OFF
ON
OFF
OFF
OFF
OFF
DIP switch (SW3) set-up: -off- means “L”
No. Switch Name
Function
1 FS1
2 FS2
3 FS0
Sampling frequency select at synchronous mode (ANS=1).
(See the datasheet.)
4 PSEL
Don’t care
5 CKS1
Set-up of CKS1 pin. (in synchronous mode)
6 TRANS
Set-up of TRANS pin. “L”: normal mode, “H”: audio routing mode
7 DIR_I/O
Don’t care
Set-up of the transmission direction of 74AC245
8 DIT_I/O
“L”: When inputting from PORT5, “H”: When outputting from
PORT5
Default
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
Jumper set up.
No. Jumper Name
1 D3V/VD
18 SDA/CDTO
19 TXP1
19(sub) CKS0
20(sub) ANS
Function
Set-up of Power supply source for 74AC245.
D3V : D3V
VD : VD (default)
Set-up of FS3 pin
Synchronous mode : short “CDTO/CM0=H” → FS3 pin=“H”
short “CM0=L” → FS3 pin=“L”
Asynchronous mode: short “CDTO/CM0=H” (default)
Set-up of TXP1 output circuit.
OPT : Optical (default)
XLR : XLR
BNC : BNC
Set-up of CKS0 pin
Open : CKS0 pin=“H”
Short : CKS0 pin=“L” (default)
Set-up depending synchronous / asynchronous mode
Open : synchronous mode
Short : asynchronous mode (default)
<KM076800>
-5-
2004/11
5 Page 
54321
GND
T45_BK
+5V
T45_BK
JP19 TXP1
OPT 1
2
XLR 3
4
BNC 5
6
PORT3
1 10
29
38
47
56
B
C
U
VOUT
VIN
R24 100
R25 100
R26 100
R27 100
R28 100
VIN
BCUV
+5V
D
R29 47k
R30 47k
R31 47k
R32 47k
PORT4
55
IN
VCC
66
IF
GND
TOTX176
4
3
2
1
VD
R33 C17
1k 0.1u
J4
TX0
21
3
4
5
T5
DA02-F
48
0.1u
15
1:1
R36
330
R37
100
T4
DA02-F
48
22
33
J3
XLOUT
15
1:1
0.1u
R34
56
XLR JP14
BNC
TXN1
JP15
MCLK
MCKO
2
EMCK
1
3
EMCK1
R38 D3V/VD
100k
PORT5
GND 10
1 MCLK
U4
C
GND 9
GND 8
GND 7
NC 6
2 BICK
3 LRCK
4 DAUX
5
DIT
DAUX1
R42
100k
DC 1
2
3
AC
JP16
ELRCK
R82 100
R83 100
R40
100k
R41
100k
R84 47k
R85 47k
R86 47k
R87 47k
R88 47k
R89 47k
18
17
16
15
14
13
12
11
B0
B1
B2
B3
B4
B5
B6
B7
A0
A1
A2
A3
A4
A5
A6
A7
2
3
4
5
6
7
8
9
R90 47k
R91 47k
R92 47k
R93 47k
R94 47k
R95 47k
R96 100
R97 100
DIR
OE
1
19
DIT_I/O
74AC245
TVDD/VDD
OVDD
CN2
B
17
C
18
U
19
VOUT
20
TVDD
21
TX0
22
TXP1
23
TXN1
24
25
26
27
28
29
OVDD
30
31
EBICK
32
D
C
U2C
65
74HC14
U2D
JP17
ELRCK
1 DC
2
3
AC
EMCK2
EMCK
CN3
33
ELRCK
34
INT0
35
89
D3V
INT1
36
U2E
B
11 10
74HC14
U2F
13 12
74HC14
RP2
9
8
A7
6
5
4
3
2
1
47k
5
74HC14
CM1/FS1
OCKS1/FS2
OCKS0/FS0
PSEL
XTL0/CKS1
XTL1/TRANS
DIR_I/O
DIT_I/O
SW3
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
D3V
D3V/VD
R48
VD
R51
10k
10k
R49 470
R52 470
R54 10k R55 470
PORT6
10 9 CSN
8 7 SCL/CCLK
R56
6 5 SDA/CDTI
51
4 3 SDA(ACK)/CDTO
21
uP-I/F
R58
D3V
10k
DIR_I/O
DIT_I/O
4
P/SN/ANS
U5
2
3
5
6
11
10
14
13
1A
1B
2A
2B
3A
3B
4A
4B
1Y 4
2Y 7
3Y 9
4Y 12
15
1
G
A/B
74LVC157
R50
R53
VD
100
100
U6A
1
2
74LS07
JP18 D3V
R57
10k
12
SDA 3
4
CDTO/CM0=H 5
6
CM0=L
SDA/CDTO
R59
R60 100
100
U6B
34
74LS07
U6D
98
74LS07
13
U6C
56
74LS07
U6E
11 10
74LS07
32
U6F
12
74LS07
CM0/CDTO/CAD1
37
CM1/CDTI/SDA
38
OCKS1/CCLK/SCL
39
OCKS0/CSN/CAD0
40
DVDD
DVDD
41
42
IPS1/IIC
43
IPS1/IIC
44
PSEL
45
XTL0
46
XTL1
47
48
B
A
Title
Size
A3
Date:
AKD4103A-B
Document Number
MAIN
Friday, November 26, 2004
Sheet 2 o f
1
Rev
0
2
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet AKD4103A-B.PDF ] | |
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