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PDF LM7001 Data sheet ( Hoja de datos )
| Número de pieza | LM7001 | |
| Descripción | Direct PLL Frequency Synthesizers for Electronic Tuning | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de LM7001 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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Ordering number : EN5262
NMOS LSI
LM7001J, 7001JM
Direct PLL Frequency Synthesizers
for Electronic Tuning
Features
• The LM7001J and LM7001JM are PLL frequency
synthesizer LSIs for tuners, making it possible to make
up high-performance AM/FM tuners easily.
• These LSIs are software compatible with the LM7000,
but do not include an IF calculation circuit.
• The FM VCO circuit includes a high-speed
programmable divider that can divide directly.
• Seven reference frequencies: 1, 5, 9, 10, 25, 50, and
100 kHz
• Band-switching outputs (3 bits)
• Controller clock output (400 kHz)
• Clock time base output (8 Hz)
• Serial input circuit for data input (using the CE, CL, and
DATA pins)
Package Dimensions
unit: mm
3006B-DIP16
[LM7001J]
unit: mm
3036B-MFP20
[LM7001JM]
SANYO: DIP16
SANYO: MFP20
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
D3095HA (OT) No. 5262-1/8
1 page  
LM7001J, 7001JM
Data Input Timing
VIH = 2.2 to 6.5 V, VIL = 0 to 0.7 V, Xtal = 5.00 to 7.20 (typ) to 8.00 MHz
Data acquisition: On the CL rising edge
Note: Data transfers must be started only after the crystal oscillator is operating normally, i.e., after a proper input signal
has been supplied to XIN.
Parameter
Enable setup time
Enable hold time
Data setup time
Data hold time
Clock low-level time
Clock high-level time
Rise time
Fall time
Symbol
tES
tEH
tSU
tHD
tLO
tHI
tR
tF
Xtal: 7.20 MHz
At least 1.5 µs
At least 1.5 µs
At least 1.5 µs
At least 1.5 µs
At least 1.5 µs
At least 1.5 µs
Up to 1 µs
Up to 1 µs
Xtal: for frequencies
other than 7.2 MHz
1 ×8
At least [ f Xtal ] × 1.35
1 ×8
At least [ f Xtal ] × 1.35
1 ×8
At least [ f Xtal ] × 1.35
1 ×8
At least [ f Xtal ] × 1.35
1 ×8
At least [ f Xtal ] × 1.35
1 ×8
At least [ f Xtal ] × 1.35
Up to 1 µs
Up to 1 µs
Example: XIN = 2.048 MHz
At least 5.27 µs
At least 5.27 µs
At least 5.27 µs
At least 5.27 µs
At least 5.27 µs
At least 5.27 µs
Up to 1 µs
Up to 1 µs
No. 5262-5/8
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet LM7001.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| LM7000 | Direct PLL Frequency Synthesizer for Electronic Tuning | Sanyo Semicon Device |
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| LM7001 | Direct PLL Frequency Synthesizers for Electronic Tuning | Sanyo Semicon Device |
| LM7001J | Direct PLL Frequency Synthesizers for Electronic Tuning | Sanyo Semicon Device |
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