LM5642 Datasheet PDF - National Semiconductor
Part Number | LM5642 | |
Description | High Voltage/ Dual Synchronous Buck Converter with Oscillator Synchronization | |
Manufacturers | National Semiconductor | |
Logo | ||
There is a preview and LM5642 download ( pdf file ) link at the bottom of this page. Total 24 Pages |
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LM5642
High Voltage, Dual Synchronous Buck Converter with
Oscillator Synchronization
General Description
The LM5642 consists of two current mode synchronous
buck regulator controllers operating 180˚ out of phase with
each other at a normal switching frequency of 200kHz.
Out of phase operation reduces the input ripple RMS cur-
rent, thereby significantly reducing the required input capaci-
tance. The switching frequency can be synchronized to an
external clock between 150kHz and 250kHz. The two switch-
ing regulator outputs can also be paralleled to operate as a
dual-phase single output regulator.
The output of each channel can be independently adjusted
from 1.3 to 90% of Vin. An internal 5V rail is also available
externally for driving bootstrap circuitry.
Current-mode feedback control assures excellent line and
load regulation and a wide loop bandwidth for excellent
response to fast load transients. Current is sensed across
either the Vds of the top FET or across an external current-
sense resistor connected in series with the drain of the top
FET.
The LM5642 features analog soft-start circuitry that is inde-
pendent of the output load and output capacitance making
the soft-start behavior more predictable and controllable
than traditional soft-start circuits.
Over-voltage protection is available for both outputs. A UV-
Delay pin is also available to allow delayed shut off time for
the IC during an output under-voltage event.
Features
n Two synchronous buck regulators
n 180˚ out of phase operation
n Synchronizable switching frequency from 150kHz to
250kHz
n 4.5V to 36V input range
n 50µA Shutdown current
n Adjustable output from 1.3V to 90% of Vin
n 0.04% (typical) line and load regulation error
n Current mode control with or without a sense resistor
n Independent enable/soft-start pins allow simple
sequential startup configuration.
n Configurable for single output parallel operation. (See
Figure 2)
n Adjustable cycle-by-cycle current limit
n Input under-voltage lockout
n Output over-voltage latch protection
n Output under-voltage protection with delay
n Thermal shutdown
n Self discharge of output capacitors when the regulator is
OFF
n TSSOP package
Applications
n Embedded Computer Systems
n Telecom Systems
n Set-Top Boxes
n WebPAD
n Point Of Load Power Architectures
Typical Application Circuit
© 2003 National Semiconductor Corporation DS200601
20060101
www.national.com
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Electrical Characteristics (Continued)
Unless otherwise specified, VIN = 28V, GND = PGND = 0V, VLIN5 = VDD1 = VDD2. Limits appearing in boldface type apply
over the specified operating junction temperature range, (-40˚C to +125˚C, if not otherwise specified). Specifications appearing
in plain type are measured using low duty cycle pulse testing with TA = 25˚C (Note 6), (Note 7). Min/Max limits are guaranteed
by design, test, or statistical analysis.
Symbol
Parameter
Conditions
Min
Typ
Max
Units
VUVP
FB1, FB2, Under
Voltage Protection Latch
Threshold
As a percentage of nominal output
voltage (falling edge)
75 80.7 86
%
Hysteresis
3.7 %
VOVP
VOUT Overvoltage
Shutdown Latch
Threshold
As a percentage measured at VFB1,
VFB2
107 114 122
%
Swx_R
SW1, SW2
ON-Resistance
VSW1 = VSW2 = 0.4V
420 487 560
Ω
Gate Drive
ICBOOT
CBOOTx Leakage
Current
VCBOOT1 = VCBOOT2 = 7V
10 nA
ISC_DRV
HDRVx and LDRVx
Source Current
VCBOOT1 = VCBOOT2 = 5V, VSWx=0V,
HDRVx=LDRVx=2.5V
0.5
A
Isk_HDRV
HDRVx Sink Current
VCBOOTx = VDDx = 5V, VSWx = 0V,
0.8
A
HDRVX = 2.5V
Isk_LDRV
LDRVx Sink Current
VCBOOTx = VDDx = 5V, VSWx = 0V,
1.1
A
LDRVX = 2.5V
RHDRV
HDRV1 & 2 Source
On-Resistance
HDRV1 & 2 Sink
On-Resistance
VCBOOT1 = VCBOOT2 = 5V,
VSW1 = VSW2 = 0V
3.1 Ω
1.5 Ω
RLDRV
LDRV1 & 2 Source
On-Resistance
LDRV1 & 2 Sink
On-Resistance
VCBOOT1 = VCBOOT2 = 5V,
VSW1 = VSW2 = 0V
VDD1 = VDD1 = 5V
3.1 Ω
1.1 Ω
Oscillator and Sync Controls
Fosc
Don_max
Oscillator Frequency
Maximum On-Duty Cycle
5.5 ≤ VIN ≤ 36V
VFB1 = VFB2 = 1V, Measured at pins
HDRV1 and HDRV2
166 200 226
96 98.9
kHz
%
Ton_min
SSOT_delta
Minimum On-Time
HDRV1 and HDRV2
Delta On Time
ON/SS1 = ON/SS2 = 2V
166
20 250
ns
ns
VHS SYNC Pin Min High
Input
2 1.52
V
VLS SYNC Pin Max Low
Input
1.44
0.8
V
Error Amplifier
IFB1, IFB2
Feedback Input Bias
Current
VFB1_FIX = 1.5V, VFB2_FIX = 1.5V
80 ±200 nA
Icomp1_SC,
Icomp2_SC
COMP Output Source
Current
VFB1_FIX = VFB2_FIX = 1V,
VCOMP1 = VCOMP2 = 1V
-20˚C to 85˚C
6 127
18
µA
Icomp1_SK,
Icomp2_SK
COMP Output Sink
Current
VFB1_FIX = VFB2_FIX = 1.5V and
VCOMP1 = VCOMP2 = 0.5V
-20˚C to 85˚C
6 118
18
µA
gm1, gm2 Transconductance
720 µmho
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