PDF UPD23C64202L Data sheet ( Hoja de datos )

Número de pieza	UPD23C64202L
Descripción	64M-BIT SYNCHRONOUS MASK-PROGRAMMABLE ROM
Fabricantes	NEC Electronics
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No Preview Available ! DATA SHEET MOS INTEGRATED CIRCUIT µPD23C64202L 64M-BIT SYNCHRONOUS MASK-PROGRAMMABLE ROM 4M-WORD BY 16-BIT (WORD MODE) / 2M-WORD BY 32-BIT (DOUBLE WORD MODE) Description The µPD23C64202L is a 67,108,864 bits synchronous mask-programmable ROM with multiplexed address bus. The word organization is selectable (WORD mode : 4,194,304 words by 16 bits, DOUBLE WORD mode : 2,097,152 words by 32 bits). The µPD23C64202L is packed in 86-pin PLASTIC TSOP (II). Features • Fully synchronous mask-ROM; all signals referenced to a positive clock edge • Word organization : 4,194,304 words by 16 bits (WORD mode) 2,097,152 words by 32 bits (DOUBLE WORD mode) • Operation frequency : up to 100 MHz Operation supply Clock frequency Access time from CLK Operating current voltage MHz ns (MAX.) (Burst mode) VCC mA (MAX.) 5 3.3 V ± 0.3 V 100 6 150 83 8 66 9 50 9 33 9 • Programmable wrap type : Sequential or Interleave • Programmable burst length : 4, 8 • Programmable /CAS latency : 3, 4, 5 or 6 • Programmable /RAS latency : 1, 2 • Burst termination by BURST STOP command • LVTTL compatible inputs and outputs Standby current (CMOS level input) µA (MAX.) 100 The information in this document is subject to change without notice. Before using this document, please confirm that this is the latest version. Not all devices/types available in every country. Please check with local NEC representative for availability and additional information. Document No. M13945EJ5V0DS00 (5th edition) Date Published August 2001 NS CP (K) Printed in Japan The mark ! shows major revised points. © 1999 1 page µPD23C64202L 12.1.12 ROW ACTIVATE - READ - ROW ACTIVATE - READ (4-4) ....................................................... 36 12.1.13 ROW ACTIVATE - READ - READ (1-1) ...................................................................................... 37 12.1.14 ROW ACTIVATE - READ - READ (1-2) ...................................................................................... 37 12.1.15 ROW ACTIVATE - READ - READ (2-1) ...................................................................................... 37 12.1.16 ROW ACTIVATE - READ - READ (2-2) ...................................................................................... 38 12.1.17 ROW ACTIVATE - READ - READ (2-3) ...................................................................................... 38 12.1.18 ROW ACTIVATE - READ - READ (2-4) ...................................................................................... 38 12.1.19 ROW ACTIVATE - READ - READ (3-1) ...................................................................................... 39 12.1.20 ROW ACTIVATE - READ - READ (3-2) ...................................................................................... 39 12.1.21 ROW ACTIVATE - READ - READ (4-1) ...................................................................................... 39 12.1.22 ROW ACTIVATE - READ - READ (4-2) ...................................................................................... 40 12.1.23 ROW ACTIVATE - READ - READ (4-3) ...................................................................................... 40 12.1.24 ROW ACTIVATE - READ - READ (4-4) ...................................................................................... 40 12.2 Random Row Read Timing .................................................................................................................... 41 12.2.1 at 100 MHz (2-5-1-1-1) ............................................................................................................... 41 12.2.2 at 100 MHz (2-5-1-1-1-1-1-1-1) ................................................................................................... 41 12.2.3 at 83 MHz (2-5-1-1-1) ................................................................................................................. 42 12.2.4 at 83 MHz (2-5-1-1-1-1-1-1-1) ..................................................................................................... 42 12.2.5 at 66 MHz (2-5-1-1-1) ................................................................................................................. 43 12.2.6 at 66 MHz (2-5-1-1-1-1-1-1-1) ..................................................................................................... 43 12.2.7 at 50 MHz (1-4-1-1-1) ................................................................................................................. 44 12.2.8 at 50 MHz (1-4-1-1-1-1-1-1-1) ..................................................................................................... 44 12.2.9 at 33 MHz (1-3-1-1-1) ................................................................................................................. 45 12.2.10 at 33 MHz (1-3-1-1-1) ................................................................................................................. 45 12.2.11 at 33 MHz (1-3-1-1-1-1-1-1-1) ..................................................................................................... 46 12.2.12 at 33 MHz (1-3-1-1-1-1-1-1-1) ..................................................................................................... 46 12.3 Random Column Read Timing ............................................................................................................... 47 12.3.1 at 100 MHz (2-5-1-1-1) ............................................................................................................... 47 12.3.2 at 100 MHz (2-5-1-1-1-1-1-1-1) ................................................................................................... 47 12.3.3 at 83 MHz (2-5-1-1-1) ................................................................................................................. 48 12.3.4 at 83 MHz (2-5-1-1-1-1-1-1-1) ..................................................................................................... 48 12.3.5 at 66 MHz (2-5-1-1-1) ................................................................................................................. 49 12.3.6 at 66 MHz (2-5-1-1-1-1-1-1-1) ..................................................................................................... 49 12.3.7 at 50 MHz (1-4-1-1-1) ................................................................................................................. 50 12.3.8 at 50 MHz (1-4-1-1-1) ................................................................................................................. 50 12.3.9 at 50 MHz (1-4-1-1-1-1-1-1-1) ..................................................................................................... 51 12.3.10 at 50 MHz (1-4-1-1-1-1-1-1-1) ..................................................................................................... 51 12.3.11 at 33 MHz (1-3-1-1-1) ................................................................................................................. 52 12.3.12 at 33 MHz (1-3-1-1-1) ................................................................................................................. 52 12.3.13 at 33 MHz (1-3-1-1-1-1-1-1-1) ..................................................................................................... 53 12.3.14 at 33 MHz (1-3-1-1-1-1-1-1-1) ..................................................................................................... 53 12.3.15 BURST STOP ............................................................................................................................. 54 12.3.16 CLOCK SUSPEND and POWER DOWN ................................................................................... 54 12.4 Command Combination Examples ........................................................................................................ 55 12.4.1 ROW ACTIVATE - READ (1) ...................................................................................................... 55 12.4.2 ROW ACTIVATE - READ (2) ...................................................................................................... 55 12.4.3 ROW ACTIVATE - READ (3) ...................................................................................................... 56 12.4.4 ROW ACTIVATE - READ (4) ...................................................................................................... 56 12.4.5 ROW ACTIVATE - READ (5) ...................................................................................................... 57 Data Sheet M13945EJ5V0DS 5 5 Page µPD23C64202L 4. Truth Table 4.1 Clock Enable and Command CLK n−1 n n+1 CKE /CS /RAS /CAS /MR Address H Command 4.2 Command Truth Table Function Symbol MODE REGISTER SET ROW ACTIVATE READ BURST STOP Standard SDRAM- precharge-like POWER DOWN Entry Exit DQM No operation MRS ACT READ BST PWDN READ NOP Organization control Illegal (SDRAM write) (SDRAM refresh) – – – Remark H : High level L : Low level × : Don't care (high or low level) V : Valid data input RA : Row address CA : Column address CKE n−1 n H× H× H× H× H× HL LH H× H× H× H× H× H× /CS /RAS /CAS /MR DQM A0 - A12 /WORD L L L L × Code L LHH× RA LHLH× CA LHHL × × L LHL × × × × × × × ××××× ××××× × × × ×V H× × × × L HHH × LHLH× LHL L× L L LH× ×× ×× ×× ×× ×× CA H or L CA × ×× Data Sheet M13945EJ5V0DS 11 11 Page

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