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Datasheet 74LS121 Equivalent ( PDF ) |
| N.º | Número de pieza | Descripción | Fabricantes | Category |
| 1 | 74LS121 | Clear and Complementary Outputs 54121 DM54121 DM74121 One-Shot with Clear and Complementary Outputs
June 1989
54121 DM54121 DM74121 One-Shot with Clear and Complementary Outputs
General Description
The DM54 74121 is a monostable multivibrator featuring both positive and negative edge triggering with complementary outputs An inte |  National | data |
| 2 | 74LS121 | Dual Retriggerable Monostable Multivibrators
19.20 20.00 Max 9 7.40 Max 6.30
Unit: mm
16
1 1.3
1.11 Max
8
0.51 Min
2.54 Min 5.06 Max
7.62
2.54 ± 0.25
0.48 ± 0.10
0.25 – 0.05 0° – 15°
Hitachi Code JEDEC EIAJ Weight (reference value)
+ 0.13
DP-16 Conforms Conforms 1.07 g
Unit: mm
10. |  Hitachi Semiconductor | data |
74L Datasheet ( Hoja de datos ) - resultados coincidentes |
| N.º | Número de pieza | Descripción | Fabricantes | Catagory |
| 1 | 74L74 | Dual Positive Edge Triggered D Flip-Flop National Semiconductor flip-flop | | |
| 2 | 74LCX00 | Low Voltage Quad 2-Input NAND Gate 74LCX00 — Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
December 2013
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
Features
■ 5V tolerant inputs ■ 2.3V–3.6V VCC specifications provided ■ 5.2ns tPD max. (VCC = 3.3V), 10µA ICC max. ■ Power down high i  Fairchild Semiconductor gate | | |
| 3 | 74LCX00 | Low voltage CMOS QUAD 2-Input NAND gate 74LCX00
Low-voltage CMOS quad dual input NAND gate with 5 V tolerant inputs
Datasheet −production data
Features
■ 5 V tolerant inputs ■ High speed
– tPD = 4.3 ns (max.) at VCC = 3 V ■ Power-down protection on inputs and outputs ■ Symmetrical output impedance
– |IOH| = IOL = 24 mA (m  ST Microelectronics gate | | |
| 4 | 74LCX00M | Low Voltage Quad 2-Input NAND Gate 74LCX00 — Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
December 2013
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
Features
■ 5V tolerant inputs ■ 2.3V–3.6V VCC specifications provided ■ 5.2ns tPD max. (VCC = 3.3V), 10µA ICC max. ■ Power down high i Fairchild Semiconductor gate | | |
| 5 | 74LCX00MTC | Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
March 1995 Revised March 1999
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
General Description
The LCX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys Fairchild Semiconductor gate | | |
| 6 | 74LCX00MTCX | Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs 74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
March 1995 Revised March 1999
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
General Description
The LCX00 contains four 2-input NAND gates. The inputs tolerate voltages up to 7V allowing the interface of 5V sys Fairchild Semiconductor gate | | |
| 7 | 74LCX00SJ | Low Voltage Quad 2-Input NAND Gate 74LCX00 — Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
December 2013
74LCX00 Low Voltage Quad 2-Input NAND Gate with 5V Tolerant Inputs
Features
■ 5V tolerant inputs ■ 2.3V–3.6V VCC specifications provided ■ 5.2ns tPD max. (VCC = 3.3V), 10µA ICC max. ■ Power down high i Fairchild Semiconductor gate | |
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