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PDF ICS332 Data sheet ( Hoja de datos )
| Número de pieza | ICS332 | |
| Descripción | Qtclock Dual Output Clock | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
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ADVANCE INFORMATION
ICS332
QTClock™ Dual Output Clock
Description
Features
The ICS332 is a low cost frequency generator that
• Packaged as 8 pin SOIC
is factory programmable. Using Phase-Locked-
Loop (PLL) techniques, the device uses a standard
fundamental mode, inexpensive crystal or clock
• Zero ppm synthesis error in many cases
• Input crystal frequency from 5 to 27 MHz
input to produce two output clocks.
• Input clock frequency from 3 to 50 MHz
The chip has one select input that allows the
mselection of one of two different frequencies stored
in memory.
.coThe device also has an power down feature that
tri states the clock outputs and turns off the PLL
when the PDTS pin is taken low.
UThis data sheet is to be used with the one-page
t4programming information for the complete
especification on the device.
• Two output clocks
• Spread spectrum capability
• Output clock frequencies up to 200 MHz
• Duty cycle of 45/55
• 3.3 V operating voltage (consult ICS for 5V)
• Advanced, low power CMOS process
• For one output clock (lowest jitter), use the
ICS331. For three output clocks, see the
ICS333. For more than three outputs, use the
ICS355.
SheBlock Diagram
.DataSEL
wwX1/ICLK
w5-27 MHz
crystal or
OTP
ROM
with PLL
Divider
Values
Crystal
Oscillator
PLL
Clock
Synthesis
and Control
Circuitry
Output
Buffer
CLK2
Output
Buffer
CLK1
clock
X2
Optional crystal capacitors
PDTS (both outputs and PLL)
MDS 332
1 Revision 111000
Integrated Circuit Systems, Inc. • 525 Race Street • San Jose •CA•95126•(408) 295-9800tel • www.icst.com
1 page | ||
| Páginas | Total 4 Páginas | |
| PDF Descargar | [ Datasheet ICS332.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
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