UPD23C128000BL Datasheet PDF - NEC
Part Number | UPD23C128000BL | |
Description | 128M-BIT MASK-PROGRAMMABLE ROM | |
Manufacturers | NEC | |
Logo | ||
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MOS INTEGRATED CIRCUIT
µ PD23C128000BL
128M-BIT MASK-PROGRAMMABLE ROM
16M-WORD BY 8-BIT (BYTE MODE) / 8M-WORD BY 16-BIT (WORD MODE)
Description
The µPD23C128000BL is a 134,217,728 bits mask-programmable ROM. The word organization is selectable
(BYTE mode : 16,777,216 words by 8 bits, WORD mode : 8,388,608 words by 16 bits). With 44-pin PLASTIC SOP
package products, only word mode can be used; it is not possible to switch to byte mode.
The active levels of OE (Output Enable Input) can be selected with mask-option.
The µPD23C128000BL is packed in 48-pin PLASTIC TSOP (I) and 44-pin PLASTIC SOP.
Features
• Word organization
16,777,216 words by 8 bits (BYTE mode) Note
8,388,608 words by 16 bits (WORD mode) Note
Note With 44-pin PLASTIC SOP package products, only word mode can be used.
It is not possible to switch to byte mode.
• Operating supply voltage : VCC = 2.7 to 3.6 V
Operating supply voltage
VCC
3.0 V ± 0.3 V
3.3 V ± 0.3 V
Access time
ns (MAX.)
120
100
Power supply current (Active mode)
mA (MAX.)
50
55
Standby current (CMOS level input)
µA (MAX.)
30
Ordering Information
Part Number
µPD23C128000BLGY-xxx-MJH
µPD23C128000BLGY-xxx-MKH
µPD23C128000BLGX-xxx
Package
48-pin PLASTIC TSOP(I) (12x18) (Normal bent)
48-pin PLASTIC TSOP(I) (12x18) (Reverse bent)
44-pin PLASTIC SOP (15.24 mm (600))
(xxx : ROM code suffix No.)
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all products and/or types are available in every country. Please check with an NEC Electronics
sales representative for availability and additional information.
Document No. M15900EJ3V0DS00 (3rd edition)
Date Published February 2003 NS CP (K)
Printed in Japan
The mark shows major revised points.
2002
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µPD23C128000BL
Input / Output Pin Functions
Pin name
Input / Output
Function
WORD, /BYTE
Input
The pin for switching WORD mode and BYTE mode.
High level : WORD mode (8M-word by 16-bit)
Low level : BYTE mode (16M-word by 8-bit)
A0 to A22
(Address inputs)
O0 to O7, O8 to O14
(Data outputs)
Input
Output
Address input pins.
A0 to A22 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
A0 to A22 are used as 23 bits address signals.
BYTE mode (16M-word by 8-bit)
A0 to A22 are used as the upper 23 bits of total 24 bits of address signal.
(The least significant bit (A−1) is combined to O15.)
Data output pins.
O0 to O7, O8 to O14 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
The lower 15 bits of 16 bits data outputs to O0 to O14.
(The most significant bit (O15) combined to A−1.)
BYTE mode (16M-word by 8-bit)
8 bits data outputs to O0 to O7 and also O8 to O14 are high impedance.
O15, A−1
(Data output 15,
LSB Address input)
/CE
(Chip Enable)
Output, Input O15, A−1 are used differently in the WORD mode and the BYTE mode.
WORD mode (8M-word by 16-bit)
The most significant output data bus (O15).
BYTE mode (16M-word by 8-bit)
The least significant address bus (A−1).
Input
Chip activating signal.
When the OE is active, output states are following.
High level : High-Z
Low level : Data out
/OE or OE or DC
(Output Enable, Don’t Care)
Input
Output enable signal. The active level of OE is mask option. The active level of OE
can be selected from high active, low active and Don’t care at order.
VCC − Supply voltage
GND
− Ground
Data Sheet M15900EJ3V0DS
5
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Information | Total 20 Pages | |
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