PDF CY9C62256 Data sheet ( Hoja de datos )

Número de pieza	CY9C62256
Descripción	32K x 8 Magnetic Nonvolatile CMOS RAM
Fabricantes	Cypress
Logotipo
Hay una vista previa y un enlace de descarga de CY9C62256 (archivo pdf) en la parte inferior de esta página. Total 11 Páginas
No Preview Available ! PRELIMINARY CY9C62256 32K x 8 Magnetic Nonvolatile CMOS RAM Features • 100% form, fit, function-compatible with 32K × 8 micropower SRAM (CY62256) — Fast Read and Write access: 70 ns — Voltage range: 4.5V–5.5V operation — Low power: 330 mW Active; 495 µW standby — Easy memory expansion with CE and OE features — TTL-compatible inputs and outputs — Automatic power-down when deselected • Replaces 32K × 8 Battery Backed (BB)SRAM, SRAM, EEPROM, FeRAM or Flash memory • Data is automatically Write protected during power loss • Write Cycles Endurance: > 1015 cycles • Data Retention: > 10 Years • Shielded from external magnetic fields • Extra 64 Bytes for device identification and tracking • Temperature ranges — Commercial: 0°C to 70°C — Industrial: – 40°C to 85°C • JEDEC STD 28-pin DIP (600-mil), 28-pin (300-mil) SOIC, and 28-pin TSOP-1 packages. Also available in 450-mil wide (300-mil body width) 28-pin narrow SOIC. Logic Block Diagram A11 A10 A9 AAA876 AA32 A1 CE WE OE INPUTBUFFER Silicon Sig. 512x512 ARRAY COLUMN DECODER POWER DOWN & WRITE PROTECT Functional Description The CY9C62256 is a high-performance CMOS nonvolatile RAM employing an advanced magnetic RAM (MRAM) process. An MRAM is nonvolatile memory that operates as a fast read and write RAM. It provides data retention for more than ten years while eliminating the reliability concerns, functional disadvantages and system design complexities of battery-backed SRAM, EEPROM, Flash and FeRAM. Its fast writes and high write cycle endurance makes it superior to other types of nonvolatile memory. The CY9C62256 operates very similarly to SRAM devices. Memory read and write cycles require equal times. The MRAM memory is nonvolatile due to its unique magnetic process. Unlike BBSRAM, the CY9C62256 is truly a monolithic nonvol- atile memory. It provides the same functional benefits of a fast write without the serious disadvantages associated with modules and batteries or hybrid memory solutions. These capabilities make the CY9C62256 ideal for nonvolatile memory applications requiring frequent or rapid writes in a bytewide environment. The CY9C62256 is offered in both commercial and industrial temperature ranges. I/O0 I/O1 I/O2 I/O3 OE I/O4 A1 A2 I/O5 AA34 I/O6 I/O7 WE VCAAC56 A7 A8 AAA11901 Pin Configurations SOIC/DIP Top View A5 A6 A7 A8 A9 A10 A11 A12 A13 A14 I/O0 II//OO12 GND 1 2 3 4 5 6 7 8 9 10 11 12 13 14 28 VCC 27 WE 26 25 AA43 24 A2 23 A1 22 OE 21 A0 20 CE 19 18 17 II//OO76 I/O5 16 I/O4 15 I/O3 22 21 A0 23 20 CE 24 25 19 18 II//OO76 26 27 28 TSOP I Top View 17 I/O5 16 15 II//OO43 1 2 (not to scale) 14 GND 13 I/O2 3 4 5 6 12 11 10 9 IIAA//OO114310 7 8 A12 Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600 Document #: 38-15001 Rev. E Revised November 15, 2004 1 page PRELIMINARY CY9C62256 AC Test Loads and Waveforms 5V OUTPUT R1 1800 Ω 5V OUTPUT 100 pF INCLUDING JIG AND SCOPE R2 990Ω (a) 5 pF INCLUDING JIG AND SCOPE R1 1800 Ω R2 990Ω (b) 3.0V GND 10% < 5 ns Equivalent to: OUTPUT ALL INPUT PULSES 90% 90% 10% < 5 ns THEVENIN EQUIVALENT 639Ω 1.77V Switching Characteristics Over the Operating Range[7] CY9C62256-70 Parameter Description Min. Max. Unit Read Cycle tRC tAA tOHA tACE tDOE tLZOE tHZOE tLZCE tHZCE tPU tPD Write Cycle[10,11] Read Cycle Time Address to Data Valid Data Hold from Address Change CE LOW to Data Valid OE LOW to Data Valid OE LOW to Low Z[8] OE HIGH to High Z[8,9] CE LOW to Low Z[8] CE HIGH to High Z[8,9] CE LOW to Power-up CE HIGH to Power-down 70 70 5 70 35 5 25 5 25 0 70 ns ns ns ns ns ns ns ns ns ns ns tWC Write Cycle Time 70 ns tSCE CE LOW to Write End 60 ns tAW Address Set-up to Write End 60 ns tHA Address Hold from Write End 0 ns tSA Address Set-up to Write Start 0 ns tPWE WE Pulse Width 50 ns tSD Data Set-up to Write End 30 ns tHD tHZWE tLZWE Data Hold from Write End WE LOW to High Z[8, 9] WE HIGH to Low Z[8] 0 ns 25 ns 5 ns Notes: 7. Test conditions assume signal transition time of 5 ns or less, timing reference levels of 1.5V, input pulse levels of 0 to 3.0V, and output loading of the specified IOL/IOH and 100-pF load capacitance. 8. At any given temperature and voltage condition, tHZCE is less than tLZCE, tHZOE is less than tLZOE, and tHZWE is less than tLZWE for any given device. 9. tHZOE, tHZCE, and tHZWE are specified with CL = 5 pF as in part (b) of AC Test Loads. Transition is measured ±500 mV from steady-state voltage. 10. The internal write time of the memory is defined by the overlap of CE LOW and WE LOW. Both signals must be LOW to initiate a write and either signal can terminate a write by going HIGH. The data input set-up and hold timing should be referenced to the rising edge of the signal that terminates the write. 11. The minimum write pulse width for write cycle #3 (WE controlled, OE LOW) is the sum of tHZWE and tSD. Document #: 38-15001 Rev. E Page 5 of 11 5 Page PRELIMINARY CY9C62256 Document History Page Document Title: CY9C62256 32K x 8 Magnetic Nonvolatile CMOS RAM Document Number: 38-15001 REV. Orig. of ECN NO. Issue Date Change Description of Change ** 115831 05/29/02 NBP New data sheet A 116770 07/25/02 NBP Add state of memory bits at the time of shipment B 117612 07/26/02 LJN Minor Change needed to change footer from 38-15003 to 38-15001 C 208424 SEE ECN NBP Icc, Isb1, Isb2, Non-Operating Shielding Specification, Condition to emulate Boot PROM functionality D 227582 SEE ECN NBP Changed Magnetic Shielding Specification E 285756 SEE ECN NBP Added SNC 28-pin SOIC package and Changed VPFD and tWP specification Document #: 38-15001 Rev. E Page 11 of 11 11 Page

Páginas	Total 11 Páginas
PDF Descargar	[ Datasheet CY9C62256.PDF ]

Hoja de datos destacado

Número de pieza	Descripción	Fabricantes
CY9C62256	32K x 8 Magnetic Nonvolatile CMOS RAM	Cypress
CY9C62256	32K X 8 Magnetic Nonvolatile CMOS RAM	Cypress Semiconductor

Número de pieza	Descripción	Fabricantes
SLA6805M	High Voltage 3 phase Motor Driver IC.	Sanken
SDC1742	12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.	Analog Devices

DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.

DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar