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PDF MC14561B Data sheet ( Hoja de datos )
| Número de pieza | MC14561B | |
| Descripción | 9s Complementer | |
| Fabricantes | Motorola Semiconductors | |
| Logotipo |  |
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MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14561B
9's Complementer
The MC14561B 9’s complementer is a companion to the MC14560B
NBCD adder to allow BCD subtraction. A BCD number (8–4–2–1 code) is
applied to the inputs (A1 = 20, A2 = 21, A3 = 22, A4 = 23). If the complement
control (Comp) is low, the BCD number appears at the outputs unmodified.
The complement disable (Comp) allows the complement control to be gated,
or an inverted control signal to be used. If the complement input is high and
the disable input low, the 9’s complement of the number is displayed at the
outputs. The zero control (Z), when high, forces the outputs low regardless of
the state of the other inputs.
When the MC14561B is used to perform BCD subtraction in conjunction
with the MC14560B NBCD adder, the complement control becomes an
add/subtract control.
• All Inputs Buffered
• Supply Voltage Range = 3.0 Vdc to 18 Vdc
• Capable of Driving Two Low–Power TTL Loads or One Low–Power
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSchottky TTL Load Over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS* (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Value
Unit
VDD DC Supply Voltage
– 0.5 to + 18.0
V
Vin, Vout Input or Output Voltage (DC or Transient) – 0.5 to VDD + 0.5 V
Iin, Iout Input or Output Current (DC or Transient), ± 10 mA
per Pin
PD Power Dissipation, per Package†
500 mW
Tstg Storage Temperature
– 65 to + 150
_C
TL Lead Temperature (8–Second Soldering)
260 _C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
Z Comp Comp
00
00
0
1
01
1
01
0
1X
X = Don’t Care.
X
F1
A1
A1
0
TRUTH TABLE
F2 F3
F4
Mode
A2 A3
A4 Straight–through
A2 A2A3 + A2A3 A2A3A4
00
0
Complement
Zero
L SUFFIX
CERAMIC
CASE 632
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
PIN ASSIGNMENT
A1
A2
A3
A4
COMP
COMP
VSS
1
2
3
4
5
6
7
14 VDD
13 F1
12 F2
11 F3
10 F4
9Z
8 NC
NC = NO CONNECTION
This device contains protection circuitry to
guard against damage due to high static
voltages or electric fields. However, pre-
cautions must be taken to avoid applications of
any voltage higher than maximum rated volt-
ages to this high–impedance circuit. For proper
v voperation, Vin and Vout should be constrained
to the range VSS (Vin or Vout) VDD.
Unused inputs must always be tied to an
appropriate logic voltage level (e.g., either VSS
or VDD). Unused outputs must be left open.
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
MC14561B
1
1 page  
TYPICAL APPLICATIONS
One MC14560B and one MC14561B permit a BCD digit to
be added to or subtracted from a second digit, such as in
the typical configurations in Figures 2 and 3. A second
MC14561B permits either digit to be added to or subtracted
from the other, or either word to appear unmodified at the
output.
ADD/SUBTRACT
ZERO
MC14561B
A1 F1
A2
A1
A3 F2
A4
COMP F3
COMP
Z F4
B1
MC14560B
Cin S1
A1
A2 S2
A3
A4 S3
B1
B2 S4
B3
Cout
A10
B10
TRUTH TABLE
Zero Add/Subtract Result
0 0 B plus A
0 1 B minus A
1X
B
X = Don’t Care
MC14561B
A1
A2
A3
A4
COMP
COMP
Z
F1
F2
F3
F4
MC14560B
Cin S1
A1
A2 S2
A3
A4 S3
B1
B2 S4
B3
B4 Cout
Figure 2. Parallel Add/Subtract Circuit (10’s Complement)
UNITS
TENS
MOTOROLA CMOS LOGIC DATA
MC14561B
5
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