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PDF OM5234 Data sheet ( Hoja de datos )
| Número de pieza | OM5234 | |
| Descripción | CMOS single-chip 8-bit microcontrollers | |
| Fabricantes | NXP Semiconductors | |
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Hay una vista previa y un enlace de descarga de OM5234 (archivo pdf) en la parte inferior de esta página. Total 10 Páginas | ||
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INTEGRATED CIRCUITS
OM5234/OM5284
CMOS single-chip 8-bit microcontrollers
Preliminary specification
1996 Nov 01
Philips
Semiconductors
1 page  
Philips Semiconductors
CMOS single-chip 8-bit microcontrollers
Preliminary specification
OM5234/OM5284
DC ELECTRICAL CHARACTERISTICS
VSS = 0V, VDD = 5V ± 10%, Tamb = 0°C to +70°C
TEST
LIMITS
SYMBOL
PARAMETER
CONDITIONS
MIN.
MAX.
UNIT
VIL
VIL1
VIL2
VIH
VIH1
VOL
VOL1
VOL2
VOH
IIL
ITL
IL1
IDD
Input low voltage, except EA, P1.6, P1.7
Input low voltage to EA
Input low voltage to P1.6, P1.7
Input high voltage, except XTAL1, RST, P1.6, P1.7
Input high voltage, XTAL1, RST
Output low voltage, ports 1, 2, 3, except P1.6, P1.7
Output low voltage, port 0, ALE, PSEN
Output low voltage, P1.6, P1.7
Output high voltage, ports 1, 2, 3, ALE, PSEN8
Logical 0 input current, ports 1, 2, 3, except P1.6, P1.7
Logical 1-to-0 transition current, ports 1, 2, 3, except P1.6, P1.7
Input leakage current, port 0, EA, P1.6, P1.7
Power supply current:
Active mode @ 16MHz1, 9
Idle mode @ 16MHz2, 9
Power down mode3, 4
IOL = 1.6mA6, 7
IOL = 3.2mA6, 7
IOL = 3.0mA
IOH = –25µA
VIN = 0.45V
See note 5
0.45V < VI < 4.7V
–0.5
–0.5
–0.5
0.2VDD+0.9
0.7VDD
0.75VDD
0.2VDD–0.1
0.2VDD–0.3
0.3VDD
VDD+0.5
VDD+0.5
0.45
0.45
0.4
–50
–650
±10
VDD=5.5V
32.0
6
50
V
V
V
V
V
V
V
V
V
µA
µA
µA
mA
mA
µA
RRST
Internal reset pull-down resistor
40 225 kΩ
CIO Pin capacitance
15 pF
NOTES:
1. The operating supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 5ns;
VIL = VSS + 0.5V; VIH = VDD –0.5V; XTAL2 not connected; EA = RST = Port 0 = P1.6 = P1.7 = VDD.
2. The idle mode supply current is measured with all output pins disconnected; XTAL1 driven with tr = tf = 5ns; VIL = VSS + 0.5V;
VIH = VDD –0.5V; XTAL2 not connected; Port 0 = P1.6 = P1.7 = VDD; EA = RST = VSS.
3. The power-down current is measured with all output pins disconnected; XTAL2 not connected; Port 0 = P1.6 = P1.7 = VDD;
EA = RST = VSS.
4. 2V ≤ VPD ≤ VDDmax.
5. Pins of ports 1 , 2, and 3 source a transition current when they are being externally driven from 1 to 0. The transition current reaches its
maximum value when VIN is approximately 2V.
6. Capacitive loading on ports 0 and 2 may cause spurious noise to be superimposed on the VOLs of ALE and ports 1 and 3. The noise is due
to external bus capacitance discharging into the port 0 and port 2 pins when these pins make 1-to-0 transitions during bus operations. In the
worst cases (capacitive loading > 100pF), the noise pulse on the ALE pin may exceed 0.8V. In such cases, it may be desirable to qualify
ALE with a Schmitt Trigger, or use an address latch with a Schmitt Trigger STROBE input.
7. Under steady state (non-transient) conditions, IOL must be externally limited as follows: Maximum IOL = 10mA per port pin; Maximum
IOL = 26mA total for Port 0; Maximum IOL = 15mA total for Ports 1, 2, and 3; Maximum IOL = 71mA total for all output pins. If IOL exceeds the
test conditions, VOL may exceed the related specification. Pins are not guaranteed to sink current greater than the listed test conditions.
8. Capacitive loading on ports 0 and 2 may cause the VOH on ALE and PSEN to momentarily fall below the 0.9VDD specification when the
address bits are stabilizing.
9. IDDMAX for other frequencies can be derived from Figure 1, where FREQ is the external oscillator frequency in MHz. IDDMAX is given in mA.
1996 Nov 01
5
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet OM5234.PDF ] | |
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