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PDF NE27200 Data sheet ( Hoja de datos )
| Número de pieza | NE27200 | |
| Descripción | C to Ka BAND SUPER LOW NOISE AMPLIFIER N-CHANNEL HJ-FET CHIP | |
| Fabricantes | NEC | |
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DATA SHEET
HETERO JUNCTION FIELD EFFECT TRANSISTOR
NE32500, NE27200
C to Ka BAND SUPER LOW NOISE AMPLIFIER
N-CHANNEL HJ-FET CHIP
DESCRIPTION
NE32500 and NE27200 are Hetero Junction FET chip that utilizes the hetero junction between Si-doped AlGaAs
and undoped InGaAs to create high mobility electrons. Its excellent low noise and high associated gain make it suitable
for commercial systems, industrial and space applications.
FEATURES
• Super Low Noise Figure & High Associated Gain
NF = 0.45 dB TYP., Ga = 12.5 dB TYP. at f = 12 GHz
• Gate Length : Lg = 0.2 µm
• Gate Width : Wg = 200 µm
ORDERING INFORMATION
PART NUMBER
NE32500
NE27200
QUALITY GRADE
Standard (Grade D)
Special, specific (Grade C and B)
ABSOLUTE MAXIMUM RATINGS (TA = 25 ˚C)
Drain to Source Voltage VDS 4.0
Gate to Source Voltage
VGS –3.0
Drain Current
ID IDSS
Total Power Dissipation
Ptot*
200
Channel Temperature
Tch 175
Storage Temperature
Tstg –65 to +175
* Chip mounted on a Alumina heatsink (size: 3 × 3 × 0.6t)
V
V
mA
mW
°C
°C
ELECTRICAL CHARACTERISTICS (TA = 25 ˚C)
PARAMETER
SYMBOL
Gate to Source Leak Current
IGSO
Saturated Drain Current
IDSS
Gate to Source Cutoff Voltage VGS(off)
Transconductance
gm
Thermal Resistance
Rth*
Noise Figure
NF
Associated Gain
Ga
MIN.
–
20
–0.2
45
–
–
11.0
TYP.
0.5
60
–0.7
60
–
0.45
12.5
MAX.
10
90
–2.0
–
260
0.55
–
UNIT
µA
mA
V
mS
˚C/W
dB
dB
TEST CONDITIONS
VGS = –3 V
VDS = 2 V, VGS = 0 V
VDS = 2 V, ID = 100 µA
VDS = 2 V, ID = 10 mA
channel to case
VDS = 2 V, ID = 10 mA, f = 12 GHz
RF performance is determined by packaging and testing 10 chips per wafer.
Wafer rejection criteria for standard devices is 2 rejects per 10 samples.
Document No. P11512EJ2V0DS00 (2nd edition)
Date Published January 1997 N
Printed in Japan
©
1996
1 page  
NE32500, NE27200
CHIP HANDLING
DIE ATTACHMENT
Die attach operation can be accomplished with Au-Sn (within a 300 ˚C – 10 s) performs in a forming gas
environment.
Epoxy die attach is not recommend.
BONDING
Bonding wires should be minimum length, semi hard gold wire (3-8 % elongation) 20 microns in diameter.
Bonding should be performed with a wedge tip that has a taper of approximately 15 %. Bonding time should be
kept to minimum.
As a general rule, the bonding operation should be kept within a 280 ˚C, 2 minutes for all bonding wires.
If longer periods are required, the temperature should be lowered.
PRECAUTIONS
The user must operate in a clean, dry environment. The chip channel is glassivated for mechanical protection only
and does not preclude the necessity of a clean environment.
The bonding equipment should be periodically checked for sources of surge voltage and should be properly
grounded at all times. In fact, all test and handling equipment should be grounded to minimize the possibilities of static
discharge.
Avoid high static voltage and electric fields, because this device is Hetero Junction field effect transistor with shottky
barrier gate.
CAUTION
The Great Care must be taken in dealing with the devices in this guide.
The reason is that the material of the devices is GaAs (Gallium Arsenide), which is
designated as harmful substance according to the law concerned.
Keep the law concerned and so on, especially in case of removal.
5
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| PDF Descargar | [ Datasheet NE27200.PDF ] | |
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