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PDF MAX6820 Data sheet ( Hoja de datos )

Número de pieza MAX6820
Descripción SOT23 Power-Supply Sequencers
Fabricantes Maxim Integrated 
Logotipo Maxim Integrated Logotipo



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No Preview Available ! MAX6820 Hoja de datos, Descripción, Manual

19-1951; Rev 2; 4/02
SOT23 Power-Supply Sequencers
General Description
The MAX6819/MAX6820 are power-supply sequencers
for dual-voltage microprocessors (µPs) and multivolt-
age systems. These devices monitor a primary supply
voltage and enable/disable an external N-channel
MOSFET switch for a secondary supply voltage. The
MAX6819/MAX6820 control local component voltage
sequencing when system power-on/power-off charac-
teristics cannot be guaranteed (supplies come from a
multivoltage system bus, silver box, or must be
sequenced in different modes for components on the
same board). These small power-supply sequencers
improve system reliability.
The MAX6819/MAX6820 include an internal voltage ref-
erence/comparator with externally adjustable thresh-
olds to monitor the primary power supply. When the
primary supply is below the desired threshold, an exter-
nal secondary supply MOSFET switch is disabled.
When the primary supply exceeds the threshold, an
internal charge pump is activated and the external
MOSFET switch is enabled to connect the secondary
supply to the load. The charge pump fully enhances the
N-channel MOSFET switch to provide a very low RDS-
ON voltage drop. The devices can be connected to
support various supply sequencing priorities such as
VI/O before VCORE or VCORE before VI/O.
The MAX6819 features a logic-driven EN input to
enable/disable the external MOSFET drive and includes
an internally fixed 200ms enable timeout period
(VPRIMARY GOOD to VSECONDARY ENABLE). The
MAX6820 allows the enable timeout period to be
adjusted with a single external capacitor. Both devices
are specified over the automotive temperature range
(-40°C to +125°C) and are available in space-saving
6-pin SOT23 packages.
Applications
Dual-Voltage Microprocessors
Multivoltage Systems
Digital Signal Processors
Power PC™ Series Processors
Features
o Adjustable Primary Supply Voltage Monitor
(Monitors Down to 0.62V)
o Internal Charge Pump to Enhance External
Secondary Supply N-Channel MOSFET Switch
o Delay from Primary Supply Good to Secondary
Supply Enabled
Factory Fixed 200ms (MAX6819)
Capacitor Adjustable (MAX6820)
o Logic Driven ENABLE Input (MAX6819)
o Immune to Short Voltage Transients
o Few External Components
o -40°C to +125°C Operating Temperature Range
o Small 6-Pin SOT23 Package
Ordering Information
PART
TEMP RANGE
PIN-
TOP
PACKAGE MARK
MAX6819UT-T -40°C to +125°C 6 SOT23-6 AARF
MAX6820UT-T -40°C to +125°C 6 SOT23-6 AARG
Products must be ordered in 2,500 piece increments.
Typical Operating Circuits
PRIMARY SUPPLY
(3.3V)
SECONDARY SUPPLY
(1.8V)
VCC2 GATE
MAX6819
VCC1 GND
DUAL-SUPPLY
BOARD OR µP
SETV EN
ON
OFF
Pin Configurations
TOP VIEW
Pin Configurations and Typical Operating Circuits
continued at end of data sheet.
VCC1 1
6 VCC2
MAX6819
GND 2
5 GATE
Power PC is a trademark of IBM corp.
SETV 3
4 EN
SOT23-6
________________________________________________________________ Maxim Integrated Products 1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

1 page




MAX6820 pdf
SOT23 Power-Supply Sequencers
PIN
MAX6819 MAX6820
11
22
33
4
4
55
66
Pin Description
NAME
VCC1
GND
SETV
EN
SETD
GATE
VCC2
FUNCTION
Supply Voltage 1. Either VCC1 or VCC2 must be greater than the UVLO to enable
external MOSFET drive.
Ground
Sequence Threshold Set. Connect to an external resistor-divider network to set the
VCC1 threshold that enables GATE turn-on. The internal reference is 0.618V.
Active-High Enable. GATE drive is enabled tDELAY after EN is driven high. GATE
drive is immediately disabled when EN is driven low. Connect to the higher of VCC1
and VCC2 if not used.
GATE Delay Set Input. Connect an external capacitor from SETD to GND to adjust
the delay from SETV > VTH to GATE turn-on. tDELAY (s) = 2.484 x 106 x CSET (F).
GATE Drive Output. GATE drives an external N-channel MOSFET to connect VCC2 to
the load. GATE drive enables tDELAY after SETV exceeds VTH and ENABLE is driven
high. GATE drive is immediately disabled when SETV drops below VTH or ENABLE is
driven low. When enabled, an internal charge pump drives GATE to VCC2 + 5.5V to
fully enhance the external N-channel MOSFET.
Supply Voltage 2. Either VCC1 or VCC2 must be greater than the UVLO to enable
external MOSFET drive.
Detailed Description
Many dual-supply processors or multivoltage boards
require one power supply to rise to the proper operat-
ing voltage before another supply is applied. Improper
sequencing can lead to chip latchup, incorrect device
initiation, or long-term reliability degradation. If the vari-
ous supply voltages are not locally generated (coming
from a main system bus, an externally purchased silver
box, or a nonsequenced power management chip),
power-on and power-off sequencing can be difficult to
control or predict. Supply loading can affect turn-
on/turn-off times from board to board.
The MAX6819/MAX6820 provide proper local voltage
sequencing in multisupply systems. The sequencers
use an external N-channel MOSFET to switch the sec-
ondary supply to the load only when the primary supply
is above a desired operating voltage threshold. The N-
channel MOSFET operates in a default off mode when
the primary supply is below the desired threshold or if
neither supply exceeds the sequencer’s UVLO level.
When the primary supply voltage is above the set
threshold, the external MOSFET is driven on. An inter-
nal charge pump fully enhances the external MOSFET
by providing a gate-to-source voltage (VGS) of +5.5V
(typ). The charge pump fully enhances the MOSFET to
yield a low drain-to-source impedance (RDS(ON)) for
VCC1 VCC2
VCC2 OUT
GATE
UVLO
SETV
SEQUENCE
GATE DRIVE
DELAY/
LOGIC
CHARGE PUMP
0.62V
GND
( ) FOR MAX6820 ONLY
EN (SETD)
Figure 1. Functional Diagram
reduced switch voltage drop. The MOSFET is never dri-
ven on unless the sequencer can provide a minimum
VGS enhancement, ensuring that the switch MOSFET
never operates in its higher impedance linear range.
Either supply may act as the primary source, regard-
less of the voltage level, provided that VCC1 or VCC2 is
greater than 2.125V (Figure 1 and Figure 2).
_______________________________________________________________________________________ 5

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