M5M5408BFP Datasheet PDF - Mitsubishi
Part Number | M5M5408BFP | |
Description | 4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM | |
Manufacturers | Mitsubishi | |
Logo | ||
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MITSUBISHI LSIs
M5M5408BFP/TP/RT/KV/KR
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
DESCRIPTION
FEATURES
The M5M5408B is a family of 4-Mbit static RAMs organized as
524,288-words by 8-bit, fabricated by Mitsubishi's high-
performance 0.25µm CMOS technology.
The M5M5408B is suitable for memory applications where a
simple interfacing , battery operating and battery backup are the
important design objectives.
M5M5408B is packaged in 32-pin plastic SOP, 32-pin plastic
TSOP and 32-pin 8mm x 13.4mm STSOP packages. Two types of
TSOPs and two types of STSOPs are available , M5M5408BTP
(normal-lead-bend TSOP) , M5M5408BRT (reverse-lead-bend
TSOP) , M5M5408BKV (normal-lead-bend STSOP) and
M5M5408BKR (reverse-lead-bend STSOP). These two types
TSOPs and two types STSOPs are suitable for a surface mounting
on double-sided printed circuit boards.
From the point of operating temperature, the family is divided
into three versions; "Standard", "W-version", and "I-version". Those
are summarized in the part name table below.
• Single +5V power supply
• Small stand-by current: 0.4µA(3V,typ.)
• No clocks, No refresh
• Data retention supply voltage=2.0V to 5.5V
• All inputs and outputs are TTL compatible.
• Easy memory expansion by S
• Common Data I/O
• Three-state outputs: OR-tie capability
• OE prevents data contention in the I/O bus
• Process technology: 0.25µm CMOS
• Package:
M5M5408BFP: 32 pin 525 mil SOP
M5M5408BTP/RT: 32 pin 400 mil TSOP(ll)
M5M5408BKV/KR: 32 pin 8mm x 13.4mm STSOP
PART NAME TABLE
Version,
Operating
temperature
Part name
(## stands for "FP","TP",
"RT","KV"or"KR")
M5M5408B## -55L
Standard
0 ~ +70°C
M5M5408B## -70L
M5M5408B## -10L
M5M5408B## -55H
M5M5408B## -70H
M5M5408B## -10H
M5M5408B## -55LW
W-version
-20 ~ +85°C
M5M5408B## -70LW
M5M5408B## -10LW
M5M5408B## -55HW
M5M5408B## -70HW
M5M5408B## -10HW
I-version
-40 ~ +85°C
M5M5408B## -55LI
M5M5408B## -70LI
M5M5408B## -10LI
M5M5408B## -55HI
M5M5408B## -70HI
M5M5408B## -10HI
Power
Supply
5.0V
5.0V
5.0V
5.0V
5.0V
5.0V
* "typical" parameter is sampled, not 100% tested.
Access
time
max.
55ns
70ns
100ns
55ns
70ns
100ns
55ns
70ns
100ns
55ns
70ns
100ns
55ns
70ns
100ns
55ns
70ns
100ns
Stand-by current Icc(PD), Vcc=3.0V
typical *
Ratings (max.)
25°C
70°C
85°C
Active
current
Icc1
(5.0V, typ.)
--- 50µA ---
0.4µA
---
0.4µA
10µA
---
---
---
100µA
20µA
50mA
(10MHz)
25mA
(1MHz)
--- --- 100µA
0.4µA
---
20µA
MITSUBISHI ELECTRIC
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revision-K0.1e, ' 98.07.30
MITSUBISHI LSIs
M5M5408BFP/TP/RT/KV/KR
PRELIMINARY
Notice: This is not a final specification.
Some parametric limits are subject to change
4194304-BIT (524288-WORD BY 8-BIT) CMOS STATIC RAM
AC ELECTRICAL CHARACTERISTICS (Vcc=5.0V±10%, unless otherwise noted)
(1) TEST CONDITIONS
Supply voltage
Input pulse
Input rise time and fall time
Reference level
Output loads
5.0V
VIH=2.4V,VIL=0.6V (FP,TP,RT,KV,KR-70,-10 )
VIH=3.0V,VIL=0V (FP,TP,RT,KV,KR-55 )
5ns
VOH=VOL=1.5V
Transition is measured ±500mV from
steady state voltage.(for ten,tdis)
Fig.1, CL=100pF (FP,TP,RT,KV,KR-70,-10 )
CL=30pF (FP,TP,RT,KV,KR-55 )
CL=5pF (for ten,tdis)
(2) READ CYCLE
Symbol
Parameter
tCR
ta(A)
Read cycle time
Address access time
ta(S) Chip select access time
ta(OE) Output enable access time
tdis(S) Output disable time after S high
tdis(OE) Output disable time after OE high
ten(S)
ten(OE)
tV(A)
Output enable time after S low
Output enable time after OE low
Data valid time after address
M5M5408BFP,TP,RT,
KV,KR-55
Min Max
55
55
55
25
20
20
10
5
10
1.8kΩ
DQ
990Ω CL
CL Including scope and
jig capacitance
Fig.1 Output load
Limits
M5M5408BFP,TP,RT, M5M5408BFP,TP,RT,
KV,KR-70
KV,KR-10
Min Max Min Max
70 100
70 100
70 100
35 50
25 35
25 35
10 10
55
10 10
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
(3) WRITE CYCLE
Symbol
Parameter
tCW Write cycle time
tw(W) Write pulse width
tsu(A)
Address set up time
tsu(A-WH) Address set up time with respect to W high
tsu(S)
tsu(D)
Chip select set up time
Data set up time
th(D)
Data hold time
trec(W) Write recovery time
tdis(W) Output disable time after W low
tdis(OE) Output disable time after OE high
ten(W) Output enable time after W high
ten(OE) Output enable time after OE low
M5M5408BFP,TP,RT,
KV,KR-55
Min Max
55
40
0
50
50
25
0
0
20
20
5
5
Limits
M5M5408BFP,TP,RT,
KV,KR-70
Min Max
M5M5408BFP,TP,RT,
KV,KR-10
Min Max
70 100
50 60
00
60 80
60 80
30 35
00
00
25 35
25 35
55
55
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MITSUBISHI ELECTRIC
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