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PDF MC14013 Data sheet ( Hoja de datos )

Número de pieza MC14013
Descripción Dual Type D Flip-Flop
Fabricantes Motorola Semiconductors 
Logotipo Motorola Semiconductors Logotipo

MC14013 datasheet


1. D Flip-Flop ( PDF )






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No Preview Available ! MC14013 Hoja de datos, Descripción, Manual

MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
MC14011B/12B (see pg 6-5)
MC14011UB/12UB (see pg 6-14)
Dual Type D Flip-Flop
The MC14013B dual type D flip–flop is constructed with MOS P–channel
and N–channel enhancement mode devices in a single monolithic structure.
Each flip–flop has independent Data, (D), Direct Set, (S), Direct Reset, (R),
and Clock (C) inputs and complementary outputs (Q and Q). These devices
may be used as shift register elements or as type T flip–flops for counter and
toggle applications.
Static Operation
Diode Protection on All Inputs
Supply Voltage Range = 3.0 Vdc to 18 Vdc
Logic Edge–Clocked Flip–Flop Design
Logic state is retained indefinitely with clock level either high or low;
information is transferred to the output only on the positive–going edge
of the clock pulse
Capable of Driving Two Low–power TTL Loads or One Low–power
Schottky TTL Load Over the Rated Temperature Range
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPin–for–Pin Replacement for CD4013B
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎMAXIMUM RATINGS* (Voltages Referenced to VSS)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎSymbol
Parameter
Value
Unit
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVDD DC Supply Voltage
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎVin, Vout Input or Output Voltage (DC or Transient)
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎlin, lout Input or Output Current (DC or Transient),
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎper Pin
– 0.5 to + 18.0
– 0.5 to VDD + 0.5
± 10
V
V
mA
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎPD Power Dissipation, per Package†
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTstg Storage Temperature
ÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎÎTL Lead Temperature(8–SecondSoldering)
500
– 65 to + 150
260
mW
_C
_C
* Maximum Ratings are those values beyond which damage to the device may occur.
†Temperature Derating:
Plastic “P and D/DW” Packages: – 7.0 mW/_C From 65_C To 125_C
Ceramic “L” Packages: – 12 mW/_C From 100_C To 125_C
TRUTH TABLE
Clock†
Inputs
Data Reset
Set
000
100
X00
XX1 0
XX0 1
XX
X = Don’t Care
† = Level Change
1
1
Outputs
QQ
01
10
QQ
01
10
11
No
Change
MC14013B
L SUFFIX
CERAMIC
CASE 632
P SUFFIX
PLASTIC
CASE 646
D SUFFIX
SOIC
CASE 751A
ORDERING INFORMATION
MC14XXXBCP
MC14XXXBCL
MC14XXXBD
Plastic
Ceramic
SOIC
TA = – 55° to 125°C for all packages.
BLOCK DIAGRAM
6
S
5DQ 1
3CQ 2
R
4
8
S
9 D Q 13
11 C Q 12
R
10
VDD = PIN 14
VSS = PIN 7
REV 3
1/94
©MMOotoTrOolaR, IOncL. A199C5MOS LOGIC DATA
MC14013B
45

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MC14013 pdf
OUTLINE DIMENSIONS
L SUFFIX
CERAMIC DIP PACKAGE
CASE 632–08
ISSUE Y
–A–
14 9
–B–
17
CL
–T–
SEATING
PLANE
F
GN
D 14 PL
0.25 (0.010) M T A S
K
M
J 14 PL
0.25 (0.010) M T B S
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. DIMENSION L TO CENTER OF LEAD WHEN
FORMED PARALLEL.
4. DIMENSION F MAY NARROW TO 0.76 (0.030)
WHERE THE LEAD ENTERS THE CERAMIC
BODY.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.750 0.785 19.05 19.94
B 0.245 0.280 6.23 7.11
C 0.155 0.200 3.94 5.08
D 0.015 0.020 0.39 0.50
F 0.055 0.065 1.40 1.65
G 0.100 BSC
2.54 BSC
J 0.008 0.015 0.21 0.38
K 0.125 0.170 3.18 4.31
L 0.300 BSC
7.62 BSC
M 0_ 15_ 0_ 15_
N 0.020 0.040 0.51 1.01
14
1
A
F
HG
8
B
7
P SUFFIX
PLASTIC DIP PACKAGE
CASE 646–06
ISSUE L
C
N
SEATING
PLANE
D
K
L
J
M
NOTES:
1. LEADS WITHIN 0.13 (0.005) RADIUS OF TRUE
POSITION AT SEATING PLANE AT MAXIMUM
MATERIAL CONDITION.
2. DIMENSION L TO CENTER OF LEADS WHEN
FORMED PARALLEL.
3. DIMENSION B DOES NOT INCLUDE MOLD
FLASH.
4. ROUNDED CORNERS OPTIONAL.
INCHES
MILLIMETERS
DIM MIN MAX MIN MAX
A 0.715 0.770 18.16 19.56
B 0.240 0.260 6.10 6.60
C 0.145 0.185 3.69 4.69
D 0.015 0.021 0.38 0.53
F 0.040 0.070 1.02 1.78
G 0.100 BSC
2.54 BSC
H 0.052 0.095 1.32 2.41
J 0.008 0.015 0.20 0.38
K 0.115 0.135 2.92 3.43
L 0.300 BSC
7.62 BSC
M 0_ 10_ 0_ 10_
N 0.015 0.039 0.39 1.01
MOTOROLA CMOS LOGIC DATA
MC14013B
49

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