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PDF LMC6582 Data sheet ( Hoja de datos )

Número de pieza LMC6582
Descripción Low Voltage / Rail-To-Rail Input and Output CMOS Operational Amplifier
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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May 1995
LMC6582 Dual/LMC6584 Quad
Low Voltage, Rail-To-Rail Input and Output CMOS
Operational Amplifier
General Description
The LMC6582/4 is a high performance operational amplifier
which can operate over a wide range of supply voltages with
guaranteed specifications at 1.8V, 2.2V, 3V, 5V, and 10V.
The LMC6582/4 provides an input common-mode voltage
range that exceeds both supplies. The rail-to-rail output
swing of the amplifier assures maximum dynamic signal
range. This rail-to-rail performance of the amplifier, com-
bined with its high open-loop voltage gain makes it unique
among rail-to-rail CMOS amplifiers. The LMC6582/4 is an
excellent choice for circuits where the input common-mode
voltage range is a concern.
The LMC6582/4 has been designed specifically to improve
system performance in low voltage applications. Guaranteed
operation down to 1.8V means that this family of amplifiers
can operate at the end of discharge (EOD) voltages of sev-
eral popular batteries. The amplifier’s 80 fA input current, 0.5
mV offset voltage, and 82 dB CMRR maintain accuracy in
battery-powered systems.
For a single, dual or quad CMOS amplifier with similar specs
and a powerdown mode, refer to the LMC6681/2/4
datasheet.
Features
(Typical unless otherwise noted)
n Guaranteed Specs at 1.8V, 2.2V, 3V, 5V, 10V
n Rail-to-Rail Input Common-Mode Voltage Range
n Rail-to-Rail Output Swing
(within 10 mV of supply rail, @ VS = 3V and RL = 10 k)
n CMRR and PSRR: 82 dB
n Ultra Low Input Current: 80 fA
n High Voltage Gain (VS = 3V, RL = 10 k): 120 dB
n Unity Gain Bandwidth: 1.2 MHz
Applications
n Battery Operated Systems
n Sensor Amplifiers
n Portable Communication Devices
n Medical Instrumentation
n Level Detectors, Sample-and-Hold Circuits
n Battery Monitoring
Connection Diagrams
8-Pin DIP/SO
14-Pin DIP/SO
DS012041-1
Top View
Top View
DS012041-2
© 1999 National Semiconductor Corporation DS012041
www.national.com

1 page




LMC6582 pdf
5V DC Electrical Characteristics
Unless otherwise specified, all limits guaranteed for TJ = 25˚C, V+ = 5.0V, V= 0V, VCM = VO = V+/2 and RL > 1 M. Bold-
face limits apply at the temperature extremes.
LMC6582AI LMC6582BI
Symbol
Parameter
Conditions
Typ
LMC6584AI LMC6584BI
Units
(Note 5)
Limit
Limit
(Note 6)
(Note 6)
VOS
Input Offset Voltage
VCM = 1.5V
0.5 1
2.5
3 mV
4.5 max
TCVOS
Input Offset Voltage
Average Drift
1.5
µV/˚C
IB
IOS
RIN
CIN
CMRR
Input Current
Input Offset Current
Input Resistance
Input Capacitance
Common Mode
(Note 12)
(Note 12)
(Note 13)
0.08
20
0.04
10
>1
3
82 70
20 pA max
10 pA max
Tera
pF
65 dB
Rejection Ratio
65 62 min
PSRR
Power Supply
±1.5V VS ±2.5V,
82
70
65 dB
Rejection Ratio
VO = V+/2 = VCM
65 62 min
VCM
Input Common Mode
CMRR > 50 dB
5.3 5.18 5.18 V
Voltage Range
5.00
5.00
min
−0.3
−0.18
−0.18
V
VO Output Swing
RL = 2 kto V+/2
0.00
0.00
max
4.9 4.85 4.85 V
4.58
4.58
min
0.05
0.2
0.2 V
0.28
0.28
max
IS Supply Current
Dual, LMC6582
VCM = 1.5V
Quad, LMC6584
1.5
2.48
2.48
mA
3.00
3.00
max
3.0
4.96
4.96
mA
VCM = 1.5V
6.00
6.00
max
5 www.national.com

5 Page





LMC6582 arduino
3.0 Low Voltage Operation (Continued)
Battery Type Nominal Voltage End of Discharge
Voltage
NiMH
1.2V
1V
NiCd
1.2V
1V
Lead-Acid
2V
1.8V
Silver Oxide
1.6V
1.3V
Carbon-Zinc
1.5V
1.1V
Lithium
2.6V–3.6V
1.7V–2.4V
At VS = 2.2V, the LMC6582/4 has a rail-to-rail input
common-mode voltage range. Figure 4 shows an input volt-
age extending to both supplies and the resulting output.
DS012041-6
FIGURE 4. The Input Common-Mode Voltage
Range Extends to Both Supplies at VS = 2.2V
The amplifier is operational at VS = 1.8V, with guaranteed in-
put common-mode voltage range, output swing, and CMRR
specs. Figure 5 shows the response of the LMC6582/4 at VS
= 1.8V.
DS012041-8
FIGURE 6. An Input Voltage Signal Exceeds
LMC6582/4 Power Supply Voltages of
VS = 1.8V with No Output Phase Inversion
4.0 Capacitive Load Tolerance
The LMC6582/4 can typically drive a 100 pF load with VS =
10V at unity gain without oscillating. The unity gain follower
is the most sensitive configuration to capacitive load. Direct
capacitive loading reduces the phase margin of op-amps.
The combination of the op-amp’s output impedance and the
capacitive load induces phase lag. This results in either an
underdamped pulse response or oscillation.
Capacitive load compensation can be accomplished using
resistive isolation as shown in Figure 7. If there is a resistive
component of the load in parallel to the capacitive compo-
nent, the isolation resistor and the resistive load create a
voltage divider at the output. This introduces a DC error at
the output.
DS012041-9
FIGURE 7. Resistive Isolation of a 350 pF Capacitive
Load
Figure 8 displays the pulse response of the LMC6582 circuit
in Figure 7.
DS012041-7
FIGURE 5. Response of the LMC6582/4
at VS = 1.8V
Figure 6 shows an input voltage exceeding both supplies
with no resulting phase inversion on the output.
DS012041-10
FIGURE 8. Pulse Response of the
LMC6582 Circuit in Figure 7
11 www.national.com

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