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PDF TDA6103Q Data sheet ( Hoja de datos )

Número de pieza TDA6103Q
Descripción Triple video output amplifier
Fabricantes NXP Semiconductors 
Logotipo NXP Semiconductors Logotipo



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No Preview Available ! TDA6103Q Hoja de datos, Descripción, Manual

INTEGRATED CIRCUITS
DATA SHEET
TDA6103Q
Triple video output amplifier
Preliminary specification
File under Integrated Circuits, IC02
March 1994
Philips Semiconductors

1 page




TDA6103Q pdf
Philips Semiconductors
Triple video output amplifier
Preliminary specification
TDA6103Q
CHARACTERISTICS
Operating range: Tj = 20 to 150 °C; VDD = 180 to 210 V; Vip = 1 to 4 V.
Test conditions (unless otherwise specified): Tamb = 25 °C; VDD = 200 V; Vip = 1.3 V; Voc1 = Voc2 = Voc3 = 12VDD;
CL = 10 pF (CL consists of parasitic and cathode capacitance); Rth h-a = 18 K/W; measured in test circuit Fig.5.
SYMBOL
PARAMETER
CONDITIONS
MIN.
TYP.
MAX. UNIT
IDD quiescent supply current
Ibias input bias current inverting inputs
(pins 1, 2 and 3)
7.0 9.25
5 1
Ibias input bias current non-inverting
input (pin 5)
15 3
Vi(offset) input offset voltage
(pins 1, 2 and 3)
50
Vi(offset) differential input offset voltage
temperature drift between pins 1
and 5; 2 and 5; 3 and 5
tbf
Cicm common-mode input capacitance
(pins 1, 2 and 3)
5
Cicm common-mode input capacitance
(pin 5)
10
Cidm
differential mode input capacitance
between 1 and 5; 2 and 5; 3 and 5
1
Voc(min) minimum output voltage
(pins 7, 8 and 9)
V15 = V25 = V35 = 1 V
5
Voc(max) maximum output voltage
(pins 7, 8 and 9)
V15 = V25 = V35 = 1 V;
note 1
VDD 10 VDD 6
GB gain-bandwidth product of
open-loop gain:
Voc1, 2, 3 / Vi1-5, 2-5, 3-5
BS small signal bandwidth
(pins 7, 8 and 9)
f = 500 kHz
Voc(p-p) = 60 V
0.75
6 7.5
BL large signal bandwidth
(pins 7, 8 and 9)
Voc(p-p) = 100 V
57
tpd
cathode output propagation delay Voc(p-p) = 100 V square
time 50% input to 50% output
wave; f < 1 MHz;
(pins 7, 8 and 9)
tr = tf = 40 ns (pins 1, 2
and 3); see Figs 7 and 8
38
tp difference in cathode output
Voc(p-p) = 100 V square
10
0
propagation time 50% input to
wave; f < 1 MHz;
50% output (pins 7 and 8, 7 and 9 tr = tf = 40 ns (pins 1, 2
and 8 and 9)
and 3)
tr
cathode output rise time 10%
Voc = 50 to 150 V square 48
60
output to 90% output
wave; f < 1 MHz; tf = 40 ns
(pins 7, 8 and 9)
(pins 1, 2 and 3); see Fig.7
tf
cathode output fall time 90% output Vo = 150 to 50 V square 48
60
to 10% output (pins 7, 8 and 9)
wave; f < 1 MHz; tr = 40 ns
(pins 1, 2 and 3); see Fig.8
11.5
+1
+1
+50
10
+10
73
73
mA
µA
µA
mV
mV/K
pF
pF
pF
V
V
GHz
MHz
MHz
ns
ns
ns
ns
March 1994
5

5 Page





TDA6103Q arduino
Philips Semiconductors
Triple video output amplifier
Preliminary specification
TDA6103Q
1,2,3
5
to
differential
stage
GND
4
VDD
6
TDA6103Q
(1)
from
input
circuit
to
differential
stage
to
differential
stage
to
differential
stage
from
input
circuit
Vbias
7,8,9
(1) All pins have an energy protection for positive or negative overstress situations.
Fig.10 Internal pin configuration.
MGA971
Dissipation
Regarding dissipation, distinction must first be made between static dissipation (independent of frequency) and dynamic
dissipation (proportional to frequency).
The static dissipation of the TDA6103Q is due to voltage supply currents and load currents in the feedback network and
CRT.
The static dissipation equals:
Pstat = VDD × IDD 3 × Voc × (Voc/Rfb IOC)
Rfb = value of feedback resistor.
IOC = DC-value of cathode current.
The dynamic dissipation equals:
Pdyn = 3 × VDD × (CL + Cfb + Cint) × fi × Vo(p-p) × δ
CL = load capacitance.
Cfb = feedback capacitance.
Cint = internal load capacitance (4 pF).
fi = input frequency.
Vo(p-p) = output voltage (peak-to-peak value).
δ = non-blanking duty-cycle.
The IC must be mounted on the picture tube base print to minimize the load capacitance (CL).
March 1994
11

11 Page







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