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PDF Am29F400AB Data sheet ( Hoja de datos )
| Número de pieza | Am29F400AB | |
| Descripción | 4 Megabit (524/288 x 8-Bit/262/144 x 16-Bit) CMOS 5.0 Volt-only/ Sector Erase Flash Memory | |
| Fabricantes | AMD | |
| Logotipo |  |
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PRELIMINARY
Am29F400AT/Am29F400AB
4 Megabit (524,288 x 8-Bit/262,144 x 16-Bit) CMOS 5.0 Volt-only,
Sector Erase Flash Memory
DISTINCTIVE CHARACTERISTICS
s 5.0 V ± 10% for read and write operations
— Minimizes system level power requirements
s Compatible with JEDEC-standards
— Pinout and software compatible with
single-power-supply flash
— Superior inadvertent write protection
s Package options
— 44-pin SO
— 48-pin TSOP
s Minimum 100,000 write/erase cycles guaranteed
s High performance
— 60 ns maximum access time
s Sector erase architecture
— One 16 Kbyte, two 8 Kbytes, one 32 Kbyte, and
seven 64 Kbytes
— Any combination of sectors can be erased. Also
supports full chip erase.
s Sector protection
— Hardware method that disables any combination
of sectors from write or erase operations.
Implemented using standard PROM
programming equipment.
s Embedded Erase™ Algorithms
— Automatically preprograms and erases the chip
or any sector
GENERAL DESCRIPTION
The Am29F400A is a 4 Mbit, 5.0 Volt-only Flash memory
organized as 512 Kbytes of 8 bits each or 256 Kwords
of 16 bits each. The 4 Mbits of data is divided into 11
sectors of one 16 Kbyte, two 8 Kbyte, one 32 Kbyte,
and seven 64 Kbytes, for flexible erase capability. The
8 bits of data will appear on DQ0–DQ7 or 16 bits on
DQ0–DQ15. The Am29F400A is offered in 44-pin SO
and 48-pin TSOP packages. This device is designed
to be programmed in-system with the standard system
5.0 Volt VCC supply. 12.0 Volt VPP is not required for
program or erase operations. The device can also be re-
programmed in standard EPROM programmers.
s Embedded Program™ Algorithms
— Automatically programs and verifies data at
specified address
s Data Polling and Toggle Bit feature for detection
of program or erase cycle completion
s Ready/Busy output (RY/BY)
— Hardware method for detection of program or
erase cycle completion
s Erase Suspend/Resume
— Supports reading data from a sector not being
erased
s Low power consumption
— 20 mA typical active read current for Byte Mode
— 28 mA typical active read current for Word Mode
— 30 mA typical program/erase current
s Enhanced power management for standby
mode
— 1 µA typical standby current
s Boot Code Sector Architecture
— T = Top sector
— B = Bottom sector
s Hardware RESET pin
— Resets internal state machine to the read mode
The standard Am29F400A offers access times of
60 ns, 70 ns, 90 ns, 120 ns and 150 ns, allowing high
speed microprocessors to operate without wait states.
To eliminate bus contention the device has sepa-
rate chip enable (CE), write enable (WE) and output
enable (OE) controls.
The Am29F400A is entirely command set compatible
with the JEDEC single-power-supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register con-
tents serve as input to an internal state-machine
which controls the erase and programming circuitry.
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication# 20380 Rev: B Amendment/0
Issue Date: April 1997
1 page  
CONNECTION DIAGRAMS
A15
A14
A13
A12
A11
A10
A9
A8
NC
NC
WE
RESET
NC
NC
RY/BY
NC
A17
A7
A6
A5
A4
A3
A2
A1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
PRELIMINARY
Standard TSOP
A16
BYTE
VSS
DQ15/A-1
DQ7
DQ14
DQ6
DQ13
DQ5
DQ12
DQ4
VCC
DQ11
DQ3
DQ10
DQ2
DQ9
DQ1
DQ8
DQ0
OE
VSS
CE
A0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
Reverse TSOP
48 A16
47 BYTE
46 VSS
45 DQ15/A-1
44 DQ7
43 DQ14
42 DQ6
41 DQ13
40 DQ5
39 DQ12
38 DQ4
37 VCC
36 DQ11
35 DQ3
34 DQ10
33 DQ2
32 DQ9
31 DQ1
30 DQ8
29 DQ0
28 OE
27 VSS
26 CE
25 A0
20380B-5
48 A15
47 A14
46 A13
45 A12
44 A11
43 A10
42 A9
41 A8
40 NC
39 NC
38 WE
37 RESET
36 NC
35 NC
34 RY/BY
33 NC
32 A17
31 A7
30 A6
29 A5
28 A4
27 A3
26 A2
25 A1
20380B-6
Am29F400AT/Am29F400AB
5
5 Page 
PRELIMINARY
It is possible to determine if a sector is protected in the
system by writing an Autoselect command. Performing
a read operation at the address location XX02H, where
the higher order address bits A12–A17 is the desired
sector address, will produce a logical “1” at DQ0 for a
protected sector. See Table 3 for Autoselect codes.
Temporary Sector Unprotect
This feature allows temporary unprotection of previ-
ously protected sectors of the Am29F400A device in
order to change data in-system. The Sector Unprotect
mode is activated by setting the RESET pin to high volt-
age (12V). During this mode, formerly protected sec-
tors can be programmed or erased by selecting the
sector addresses. Once the 12 V is taken away from
the RESET pin, all the previously protected sectors will
be protected again. Refer to Figures 16 and 17.
Command Definitions
Device operations are selected by writing specific ad-
dress and data sequences into the command register.
Writing incorrect address and data values
or writing them in the improper sequence will reset
the device to the read mode. Table 7 defines the valid
r e g i s t e r c o m m a n d s e q u e n c e s. N o t e t h a t t h e
Erase Suspend (B0H) and Erase Resume (30H) com-
mands are valid only while the Sector Erase operation
is in progress. Moreover, both Reset/Read commands
are functionally equivalent, resetting the device to the
read mode.
Am29F400AT/Am29F400AB
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet Am29F400AB.PDF ] | |
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