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What is P80C851FFP?

This electronic component, produced by the manufacturer "NXP Semiconductors", performs the same function as "CMOS single-chip 8-bit microcontroller with on-chip EEPROM".


P80C851FFP Datasheet PDF - NXP Semiconductors

Part Number P80C851FFP
Description CMOS single-chip 8-bit microcontroller with on-chip EEPROM
Manufacturers NXP Semiconductors 
Logo NXP Semiconductors Logo 


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INTEGRATED CIRCUITS
80C851/83C851
CMOS single-chip 8-bit microcontroller
with on-chip EEPROM
Product specification
Supersedes data of 1992 Nov 25
IC20 Data Handbook
1998 Jul 03
Philips
Semiconductors

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P80C851FFP equivalent
Philips Semiconductors
CMOS single-chip 8-bit microcontroller
with on-chip EEPROM
Product specification
80C851/83C851
PIN DESCRIPTION
PIN NO.
MNEMONIC DIP LCC QFP TYPE
NAME AND FUNCTION
VSS 20 22 16, 39 I Ground: 0V reference.
VDD
40 44 38
I Power Supply: This is the power supply voltage for normal, idle, and power-down
operation.
P0.0–0.7
39–32 43–36 37–30
I/O Port 0: Port 0 is an open-drain, bidirectional I/O port. Port 0 pins that have 1s written to
them float and can be used as high-impedance inputs. Port 0 is also the multiplexed
low-order address and data bus during accesses to external program and data memory.
In this application, it uses strong internal pull-ups when emitting 1s.
P1.0–P1.7
P2.0–P2.7
1–8 2–9 40–44, I/O Port 1: Port 1 is an 8-bit bidirectional I/O port with internal pull-ups. Port 1 pins that have
1–3 1s written to them are pulled high by the internal pull-ups and can be used as inputs. As
inputs, port 1 pins that are externally pulled low will source current because of the
internal pull-ups. (See DC Electrical Characteristics: IIL).
21–28 24–31 18–25 I/O Port 2: Port 2 is an 8-bit bidirectional I/O port with internal pull-ups. Port 2 pins that have
1s written to them are pulled high by the internal pull-ups and can be used as inputs. As
inputs, port 2 pins that are externally being pulled low will source current because of the
internal pull-ups. (See DC Electrical Characteristics: IIL). Port 2 emits the high-order
address byte during fetches from external program memory and during accesses to
external data memory that use 16-bit addresses (MOVX @DPTR). In this application, it
uses strong internal pull-ups when emitting 1s. During accesses to external data memory
that use 8-bit addresses (MOV @Ri), port 2 emits the contents of the P2 special function
register.
P3.0–P3.7
RST
ALE
10–17 11,
5,
13–19 7–13
10 11
5
11 13
7
12 14
8
13 15
9
14 16 10
15 17 11
16 18 12
17 19 13
9 10 4
30 33 27
I/O Port 3: Port 3 is an 8-bit bidirectional I/O port with internal pull-ups. Port 3 pins that have
1s written to them are pulled high by the internal pull-ups and can be used as inputs. As
inputs, port 3 pins that are externally being pulled low will source current because of the
pull-ups. (See DC Electrical Characteristics: IIL). Port 3 also serves the special features
of the SC80C51 family, as listed below:
I RxD (P3.0): Serial input port
O TxD (P3.1): Serial output port
I INT0 (P3.2): External interrupt
I INT1 (P3.3): External interrupt
I T0 (P3.4): Timer 0 external input
I T1 (P3.5): Timer 1 external input
O WR (P3.6): External data memory write strobe
O RD (P3.7): External data memory read strobe
I Reset: A high on this pin for two machine cycles while the oscillator is running, resets the
device. An internal diffused resistor to VSS permits a power-on reset using only an
external capacitor to VDD.
I/O Address Latch Enable: Output pulse for latching the low byte of the address during an
access to external memory. In normal operation, ALE is emitted at a constant rate of 1/6
the oscillator frequency, and can be used for external timing or clocking. Note that one
ALE pulse is skipped during each access to external data memory.
PSEN
29 32 26
O Program Store Enable: The read strobe to external program memory. When the device
is executing code from the external program memory, PSEN is activated twice each
machine cycle, except that two PSEN activations are skipped during each access to
external data memory. PSEN is not activated during fetches from internal program
memory.
EA
31 35 29
I External Access Enable: If during a RESET, EA is held at TTL, level HIGH, the CPU
executes out of the internal program memory ROM provided the Program Counter is less
than 4096. If during a RESET, EA is held a TTL LOW level, the CPU executes out of
external program memory. EA is not allowed to float.
XTAL1
19 21 15
I Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock
generator circuits.
XTAL2
18 20 14
O Crystal 2: Output from the inverting oscillator amplifier.
1998 Jul 03
5


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Part Details

On this page, you can learn information such as the schematic, equivalent, pinout, replacement, circuit, and manual for P80C851FFP electronic component.


Information Total 22 Pages
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