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TPA Datasheet PDF - STMicroelectronics

Part Number TPA
Description TRISIL
Manufacturers STMicroelectronics 
Logo STMicroelectronics Logo 

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SMP50 / SMTPA / TPA
Trisil™ for telecom equipment protection
Features
Bidirectional crowbar protection
Voltage range from 62 V to 320 V
Low capacitance from 12 pF to 20 pF @ 50 V
Low leakage current : IR = 2 µA max
Holding current: IH = 150 mA min
Repetitive peak pulse current :
IPP = 50 A (10/1000 µs)
Main applications
Telecommunication equipment such as:
Analog and digital line cards (xDSL, T1/E1,
ISDN, ...)
Terminals (phone, fax, modem, ...) and central
office equipment
Description
These Trisil series have been designed to protect
telecommunication equipment against lightning
and transient induced by AC power lines.
They are available in SMA, SMB and DO-15
packages.
Benefits
Trisils are not subject to ageing and provide a fail
safe mode in short circuit for a better protection.
They are used to help equipment to meet various
standards such as UL1950, IEC950 / CSA C22.2,
UL1459 and FCC part 68.
Trisils have UL94 V0 approved resin.
SMA and SMB packages are JEDEC registered
(DO-214AC and DO-214AA).
Trisils are UL497B approved (file: E136224).
SMA
SMB
(JEDEC DO-214AC) (JEDEC DO-214AA)
SMP50
SMTPA
DO-15
TPA
Order codes
Part Number
SMP50-xxx
TPAxxx
SMTPAxxx
Marking
See Ordering Information
on page 9
Schematic Diagram
TM: TRISIL is a trademark of STMicroelectronics
June 2007
Rev 3
1/11
www.st.com
11

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TPA equivalent
SMP50 / SMTPA / TPA
Characteristics
Figure 3.
IT(A)
50
20
10
5
2
1
01
On-state voltage versus on-state
current (typical values)
Figure 4.
Relative variation of holding
current versus junction
temperature
IH[Tj] / IH[Tj=25°C]
2.0
1.8
Tj=25°C
1.6
1.4
1.2
1.0
0.8
0.6
0.4
VT(V)
0.2 Tj(°C)
0.0
2 3 4 5 6 7 8 9 10
-40 -20
0 20 40 60
80 100
120
Figure 5.
Relative variation of breakover
voltage versus junction
temperature
VBO[Tj] / VBO[Tj=25°C]
1.10
1.05
1.00 270 V
Figure 6.
Relative variation of leakage
current versus reverse voltage
applied (typical values)
IRM[Tj] / IRM[Tj=25°C]
2000
1000
VR=VRM
100
0.95
62 V
0.90
-40
-20
10
Tj(°C)
0 20 40 60 80 100
1
25
Tj(°C)
50 75
100
125
Figure 7.
Variation of thermal impedance Figure 8.
junction to ambient versus pulse
duration (Printed circuit board FR4,
SCu = 35 µm, recommended pad
layout)
Relative variation of junction
capacitance versus reverse voltage
applied (typical values)
Zth(j-a)(°C/W)
1E+2
1E+1
SMTPA / TPA
C[VR] / C[VR=50V]
2.5
2.0
1.5
Tj=25°C
F=1MHz
VRMS=1V
1E+0
1E-1
1E-3
1E-2
SMP50
tp(s)
1E-1
1E+0
1E+1
1.0
0.5
1E+2 5E+2
0.0
1
2
VR(V)
5 10 20
50 100
300
5/11


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