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PDF UPD75P3036 Data sheet ( Hoja de datos )
| Número de pieza | UPD75P3036 | |
| Descripción | 4-BIT SINGLE-CHIP MICROCONTROLLER | |
| Fabricantes | NEC | |
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DATA SHEET
MOS INTEGRATED CIRCUIT
µPD75P3036
4-BIT SINGLE-CHIP MICROCONTROLLER
The µPD75P3036 replaces the µPD753036’s internal mask ROM with a one-time PROM or EPROM.
Because the µPD75P3036 supports programming by users, it is suitable for use in prototype testing for system
development using the µPD753036 and for use in small-scale production.
* Caution The µPD75P3036KK-T is not designed to guarantee the reliability required for use in mass-
production. Please use it only for performance evaluation during testing and test production runs.
Detailed descriptions of functions are provided in the following document. Be sure to read the document
before designing.
µPD753036 User’s Manual : U10201E
FEATURES
• Compatible with µPD753036
• Internal PROM: 16384 × 8 bits
• µPD75P3036KK-T
: Reprogrammable (ideally suited for system evaluation)
• µPD75P3036GC, 75P3036GK : One-time programmable (ideally suited for small-scale production)
• Internal RAM: 768 × 4 bits
• Can operate in the same power supply voltage as the mask version µPD753036
• VDD = 1.8 to 5.5 V
• LCD controller/driver
• A/D converter
Caution Mask-option pull-up resistors are not provided in this device.
ORDERING INFORMATION
Part Number
Package
Internal PROM
Quality Grade
µPD75P3036GC-3B9 80-pin plastic QFP
One-time PROM Standard
(14 × 14 mm, 0.65-mm pitch)
µPD75P3036GK-BE9 80-pin plastic TQFP
One-time PROM Standard
(fine pitch) (12 × 12 mm, 0.5-mm pitch)
* µPD75P3036KK-T
80-pin ceramic WQFN
EPROM
Not applicable
Please refer to "Quality Grades on NEC Semiconductor Devices" (Document No. C11531E) published by
NEC Corporation to know the specification of quality grade on the devices and its recommended applications.
In this document, the term PROM is used in parts common to one-time PROM versions and EPROM versions.
The information in this document is subject to change without notice.
Document No. U11575EJ1V0DS00 (1st edition)
(Previous No. IP-3657)
Date Published November 1996 P
Printed in Japan
*The mark shows major revised points.
© 1996
1 page  
PIN IDENTIFICATIONS
P00 to P03
P10 to P13
P20 to P23
P30 to P33
P40 to P43
P50 to P53
P60 to P63
P70 to P73
P80 to P83
BP0 to BP7
KR0 to KR7
SCK
SI
SO
SB0, SB1
AVREF
AVSS
AN0-AN7
MD0 to MD3
D0 to D7
: Port0
: Port1
: Port2
: Port3
: Port4
: Port5
: Port6
: Port7
: Port8
: Bit Port0-7
: Key Return 0-7
: Serial Clock
: Serial Input
: Serial Output
: Serial Bus 0,1
: Analog Reference
: Analog Ground
: Analog Input 0-7
: Mode Selection 0-3
: Data Bus 0-7
µPD75P3036
S12 to S31
: Segment Output 12-31
COM0 to COM3 : Common Output 0-3
VLC0 to VLC2
: LCD Power Supply 0-2
BIAS
: LCD Power Supply Bias Control
LCDCL
: LCD Clock
SYNC
: LCD Synchronization
TI0 to TI2
: Timer Input 0-2
PTO0 to PTO2 : Programmable Timer Output 0-2
BUZ
: Buzzer Clock
PCL : Programmable Clock
INT0, INT1, INT4 : External Vectored Interrupt 0, 1, 4
INT2
: External Test Input 2
X1, X2
: Main System Clock Oscillation 1, 2
XT1, XT2
: Subsystem Clock Oscillation 1, 2
RESET
: Reset
VPP : Programming Power Supply
VDD : Positive Power Supply
VSS : Ground
5
5 Page 
µPD75P3036
3.3 Pin Input/Output Circuits
The input/output circuits for the µPD75P3036’s pins are shown in schematic form below.
TYPE A
IN
VDD
P-ch
N-ch
TYPE D
data
output
disable
(1/3)
VDD
P-ch
OUT
N-ch
TYPE B
CMOS standard input buffer
IN
Schmitt trigger input with hysteresis characteristics.
TYPE B-C
VDD
P.U.R.
P-ch
P.U.R.
enable
IN
P.U.R. : Pull-Up Resistor
Push-pull output that can be set to output high-impedance
(with both P-ch and N-ch OFF).
TYPE E-B
P.U.R.
enable
VDD
P.U.R.
P-ch
data
output
disable
Type D
IN/OUT
Type A
TYPE E-E
data
output
disable
P.U.R. : Pull-Up Resistor
P.U.R.
enable
VDD
P.U.R.
P-ch
Type D
IN/OUT
Type A
Type B
P.U.R. : Pull-Up Resistor
11
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| PDF Descargar | [ Datasheet UPD75P3036.PDF ] | |
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