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K9F2G08U0M Datasheet PDF - Samsung semiconductor

Part Number K9F2G08U0M
Description FLASH MEMORY
Manufacturers Samsung semiconductor 
Logo Samsung semiconductor Logo 

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K9F2G08Q0M K9F2G16Q0M
K9F2G08U0M K9F2G16U0M
Document Title
256M x 8 Bit / 128M x 16 Bit NAND Flash Memory
Preliminary
FLASH MEMORY
Revision History
Revision No History
0.0 1. Initial issue
0.1 1. Add the Rp vs tr ,tf & Rp vs Ibusy graph for 1.8V device (Page 34)
2. Add the data protection Vcc guidence for 1.8V device - below about
1.1V. (Page 35)
0.2 The min. Vcc value 1.8V devices is changed.
K9F2GXXQ0M : Vcc 1.65V~1.95V --> 1.70V~1.95V
Draft Date Remark
Sep. 19.2001 Advance
Nov. 22. 2002 Preliminary
Mar. 6.2003
Preliminary
0.3 Few current value is changed.
Before
Unit : us
K9F2GXXQ0M K9F2GXXU0M
Typ. Max. Typ.
Max.
ISB2 20 100 20
100
ILI - ±20 - ±20
ILO - ±20 - ±20
After
ISB2
ILI
ILO
K9F2GXXQ0M
Typ. Max.
10 50
- ±10
- ±10
K9F2GXXU0M
Typ. Max.
10 50
- ±10
- ±10
Apr. 2. 2003 Preliminary
0.4 1. The 3rd Byte ID after 90h ID read command is don’t cared.
Apr. 9. 2003 Preliminary
The 5th Byte ID after 90h ID read command is deleted.
2. Note is added.
(VIL can undershoot to -0.4V and VIH can overshoot to VCC +0.4V for
durations of 20 ns or less.)
3. Pb-free Package is added.
K9F2G08Q0M-PCB0,PIB0
K9F2G08U0M-PCB0,PIB0
K9F2G16U0M-PCB0,PIB0
K9F2G16Q0M-PCB0,PIB0
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the
right to change the specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions about device. If you
have any questions, please contact the SAMSUNG branch office near your office.
1

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K9F2G08U0M equivalent
K9F2G08Q0M K9F2G16Q0M
K9F2G08U0M K9F2G16U0M
Preliminary
FLASH MEMORY
PIN DESCRIPTION
Pin Name
I/O0 ~ I/O7
(K9F2G08X0M)
I/O0 ~ I/O15
(K9F2G16X0M)
Pin Function
DATA INPUTS/OUTPUTS
The I/O pins are used to input command, address and data, and to output data during read operations. The I/
O pins float to high-z when the chip is deselected or when the outputs are disabled.
I/O8 ~ I/O15 are used only in X16 organization device. Since command input and address input are x8 oper-
ation, I/O8 ~ I/O15 are not used to input command & address. I/O8 ~ I/O15 are used only for data input and
output.
COMMAND LATCH ENABLE
CLE
The CLE input controls the activating path for commands sent to the command register. When active high,
commands are latched into the command register through the I/O ports on the rising edge of the WE signal.
ADDRESS LATCH ENABLE
ALE The ALE input controls the activating path for address to the internal address registers. Addresses are
latched on the rising edge of WE with ALE high.
CHIP ENABLE
CE
The CE input is the device selection control. When the device is in the Busy state, CE high is ignored, and
the device does not return to standby mode in program or erase operation. Regarding CE control during
read operation, refer to ’Page read’section of Device operation .
READ ENABLE
RE The RE input is the serial data-out control, and when active drives the data onto the I/O bus. Data is valid
tREA after the falling edge of RE which also increments the internal column address counter by one.
WRITE ENABLE
WE The WE input controls writes to the I/O port. Commands, address and data are latched on the rising edge of
the WE pulse.
WRITE PROTECT
WP The WP pin provides inadvertent write/erase protection during power transitions. The internal high voltage
generator is reset when the WP pin is active low.
READY/BUSY OUTPUT
R/B
The R/B output indicates the status of the device operation. When low, it indicates that a program, erase or
random read operation is in process and returns to high state upon completion. It is an open drain output and
does not float to high-z condition when the chip is deselected or when outputs are disabled.
PRE
POWER-ON READ ENABLE
The PRE controls auto read operation executed during power-on. The power-on auto-read is enabled when
PRE pin is tied to Vcc.
Vcc
POWER
VCC is the power supply for device.
Vss GROUND
N.C
NO CONNECTION
Lead is not internally connected.
NOTE : Connect all VCC and VSS pins of each device to common power supply outputs.
Do not leave VCC or VSS disconnected.
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