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PDF DS96F173 Data sheet ( Hoja de datos )

Número de pieza DS96F173
Descripción Quad Differential Receivers
Fabricantes National Semiconductor 
Logotipo National Semiconductor Logotipo



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No Preview Available ! DS96F173 Hoja de datos, Descripción, Manual

May 1998
DS96F173C/DS96F173M/DS96F175C/DS96F175M
EIA-485/EIA-422 Quad Differential Receivers
General Description
The DS96F173 and the DS96F175 are high speed quad dif-
ferential line receivers designed to meet the EIA-485 stan-
dard. The DS96F173 and the DS96F175 offer improved per-
formance due to the use of L-FAST bipolar technology. The
use of LFAST technology allows the DS96F173 and
DS96F175 to operate at higher speeds while minimizing
power consumption.
The DS96F173 and the DS96F175 have TRI-STATE® out-
puts and are optimized for balanced multipoint data bus
transmission at rates up to 15 Mbps. The receivers feature
high input impedance, input hysteresis for increased noise
immunity, and input sensitivity of 200 mV over a common
mode input voltage range of −7V to +12V. The receivers are
therefore suitable for multipoint applications in noisy environ-
ments. The DS96F173 features an active high and active
low Enable, common to all four receivers. The DS96F175
features separate active high Enables for each receiver pair.
Features
n Meets EIA-485, EIA-422A, EIA-423A standards
n Designed for multipoint bus applications
n TRI-STATE outputs
n Common mode input voltage range: −7V to +12V
n Operates from single +5.0V supply
n Reduced power consumption (ICC = 50 mA max)
n Input sensitivity of ±200 mV over common mode range
n Input hysteresis of 50 mV typical
n High input impedance
n Military temperature range available
n Qualified for MIL STD 883C
n Available to standard military drawings (SMD)
n Available in DIP(J), LCC(E), and FlatPak (W) packages
n DS96F173 and DS96F175 are lead and function
compatible with SN75173/175 or the
AM26LS32/MC3486
Logic Diagrams
DS96F175
DS009627-10
DS009627-11
Function Tables
(Each Receiver) DS96F173
Differential Inputs
A–B
VID 0.2V
VID −0.2V
X
X
H = High Level
L = Low Level
Z = High Impedance (off)
X = Don’t Care
Enable
EE
HX
XL
HX
XL
LX
XH
Output
Y
H
H
L
L
Z
Z
(Each Receiver) DS96F175
Differential Inputs
A–B
VID 0.2V
VID −0.2V
X
Enable
E
H
H
L
Output
Y
H
L
Z
TRI-STATE® is a registered trademark of National Semiconductor Corporation.
© 1998 National Semiconductor Corporation DS009627
www.national.com

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DS96F173 pdf
Switching Characteristics (Continued)
VCC = 5.0V
Symbol
Parameter
Conditions
tZL Output Enable Time to Low
Level
tHZ Output Disable Time from High
Level
tLZ
|tPLH– tPHL|
Output Disable Time from Low
Level
Pulse Width Distortion (SKEW)
CL = 15 pF, Figure 3
CL = 5.0 pF, Figure 2(Note 15)
CL = 20 pF, Figure 2(Note 15)
CL = 5.0 pF, Figure 3
Figure 1
TA = 25˚C TA = −55˚C
Typ Max
13 18
Max
27
14 20
27
14 30
14 18
37
30
13
5.0
TA =
125˚C
Max
27
Units
ns
27 ns
37 ns
30 ns
5.0 ns
SMD Number:
Order Number:
DS96F173MJ
DS96F173MW
DS96F173ME
DS96F175MJ
DS96F175MW
DS96F175ME
883 Marking
DS96F173MJ/883
DS96F175MJ/883
See NS Package Number
J16A
5962-9076602 MEA
5962-9076602 MFA
5962-9076602 M2A
5962-9076601 MEA
5962-9076601 MFA
5962-9076601 M2A
SMD Marking
DS96F173MJ-SMD
DS96F175MJ-SMD
DS96F173ME/883
DS96F175ME/883
See NS Package Number
E20A
DS96F173ME-SMD
DS96F175ME-SMD
DS96F173MW/883
DS96F173MW-SMD
DS96F175MW/883
DS96F175MW-SMD
See NS Package Number
W16A
For complete Military Product Specifications, refer
to the appropriate SMD or MDS.
5 www.national.com

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