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What is 3964?

This electronic component, produced by the manufacturer "Allegro MicroSystems", performs the same function as "DUAL FULL-BRIDGE PWM MOTOR DRIVER".


3964 Datasheet PDF - Allegro MicroSystems

Part Number 3964
Description DUAL FULL-BRIDGE PWM MOTOR DRIVER
Manufacturers Allegro MicroSystems 
Logo Allegro MicroSystems Logo 


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3964
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
3964
DUAL FULL-BRIDGE PWM MOTOR DRIVER
A3964SLB
OUT 1B 1
SENSE 1 2
OUT 1A 3
LOAD 4
SUPPLY
GROUND 5
1
VBB
GROUND 6
VREF(IN) 7
RC 1 89
PHASE 1 9 θ1
ENABLE 1 10
20 OUT 2B
2 19 SENSE 2
18 OUT 2A
V CC
17
LOGIC
SUPPLY
16 GROUND
15 GROUND
14 V REF(OUT)
13 RC 2
θ 2 12 PHASE 2
11 ENABLE 2
Dwg. PP-047-1
ABSOLUTE MAXIMUM RATINGS
Load Supply Voltage, VBB . . . . . . . . . 33 V
Output Current, IOUT (10 µs) . . . . . . ±1.0 A*
(continuous) . . . . . . . . . . . . . ±800 mA*
Logic Supply Voltage, VCC . . . . . . . . . 7.0 V
Logic Input Voltage Range,
VIN . . . . . . . . . . . -0.3 V to VCC + 0.3 V
Sense Voltage, VS . . . . . . . . . . . . . . . 1.0 V
Reference Output Current,
IREF(OUT) . . . . . . . . . . . . . . . . . . 1.0 mA
Package Power Dissipation,
PD . . . . . . . . . . . . . . . . . . . . See Graph
Operating Temperature Range,
TA . . . . . . . . . . . . . . . . -20˚C to +85˚C
Junction Temperature, TJ . . . . . . . +150˚C†
Storage Temperature Range,
TS . . . . . . . . . . . . . . . -55˚C to +150˚C
* Output current rating may be limited by duty cycle,
ambient temperature, and heat sinking. Under any set
of conditions, do not exceed the specified current rating
or a junction temperature of 150˚C.
† Fault conditions that produce excessive junction
temperature will activate the device’s thermal shutdown
circuitry. These conditions can be tolerated but should
be avoided.
Designed for pulse-width modulated (PWM) current control of
bipolar stepper motors, the A3964SB and A3964SLB are capable of
continuous output currents to ±800 mA and operating voltages to 30 V.
Internal fixed off-time PWM current-control circuitry can be used to
regulate the maximum load current to a desired value. An internal
precision voltage reference is provided to improve motor peak-current
control accuracy. The peak load current limit is set by the user’s
selection of an external resistor divider and current-sensing resistors.
The fixed off-time pulse duration is set by user-selected external
RC timing networks. The capacitor in the RC timing network also
determines a user-selectable blanking window that prevents false
triggering of the PWM current control circuitry during switching transi-
tions. This eliminates the need for two external RC filter networks on
the current-sensing comparator inputs.
For each bridge the PHASE input controls load current polarity by
selecting the appropriate source and sink driver pair. For each bridge
the ENABLE input, when held high, disables the output drivers. Spe-
cial power-up sequencing is not required. Internal circuit protection
includes thermal shutdown with hysteresis, transient-suppression
diodes, and crossover-current protection.
The A3964SB is supplied in a 24-pin plastic DIP with copper heat
sink tabs; A3964SLB is supplied in a 20-lead plastic SOIC with copper
heat sink tabs. The power tabs are at ground potential and need no
electrical isolation.
FEATURES
s ±800 mA Continuous Output Current Rating
s 30 V Output Voltage Rating
s Internal PWM Current Control, Saturated Sink Drivers
s Internally Generated, Precision 2.5 V Reference
s Internal Transient-Suppression Diodes
s Internal Thermal-Shutdown Circuitry
s Crossover-Current Protection, UVLO Protection
Always order by complete part number:
Part Number
A3964SB
A3964SLB
Package
24-Pin DIP
20-Lead Wide-Body SOIC

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3964 equivalent
3964
DUAL FULL-BRIDGE
PWM MOTOR DRIVER
FUNCTIONAL DESCRIPTION
Internal PWM Current Control. The A3964SB and
A3964SLB contain a fixed off-time pulse-width modulated
(PWM) current-control circuit that can be used to limit the
load current to a desired value. The peak value of the
current limiting (ITRIP) is set by the selection of an external
current-sensing resistor (RS) and reference input voltage
(VREF(IN)). The internal circuitry compares the voltage
across the external sense resistor to the voltage on the
reference input terminal (VREF(IN)) resulting in a
transconductance function approximated by:
ITRIP
VREF(IN)
RS
The reference input voltage is typically set with a
resistor divider from VREF(OUT). To ensure proper operation
of the voltage reference, the resistor divider should have
an impedance of 3 kto 15 k(RD = RA+RB). Within this
range, a low impedance will minimize the effect of the REF
IN input offset current.
The current-control circuitry limits the load current as
follows: when the load current reaches ITRIP, the compara-
tor resets a latch that turns off the selected source driver.
The load inductance causes the current to recirculate
through the sink driver and flyback diode.
For each bridge, the user selects an external resistor
(RT) and capacitor (CT) to determine the time period
(tOFF = RTCT) during which the source driver remains
disabled (see “RC Fixed Off-time” below). The range of
recommended values for CT and RT are 1000 pF to 1500
pF and 15 kto 100 krespectively. For optimal load
current regulation, CT is normally set to 1000 pF (see
“Load Current Regulation” below). At the end of the RC
interval, the source driver is enabled allowing the load
current to increase again. The PWM cycle repeats,
maintaining the peak load current at the desired value.
RC Blanking. In addition to determining the fixed off-time
of the PWM control circuit, the CT component sets the
comparator blanking time. This function blanks the output
of the comparator when the outputs are switched by the
internal current-control circuitry (or by the PHASE or
ENABLE inputs). The comparator output is blanked to
prevent false over-current detections due to reverse-
recovery currents of the clamp diodes, and/or switching
transients related to distributed capacitance in the load.
During internal PWM operation, at the end of the tOFF
time, the comparator’s output is blanked and CT begins to
be charged from approximately 1.1 volts by an internal
current source of approximately 1 mA. The comparator
output remains blanked until the voltage on CT reaches
approximately 3 volts.
When a transition of the PHASE input occurs, CT
is discharged to near ground during the crossover delay
time (the crossover delay time is present to prevent
simultaneous conduction of the source and sink drivers).
After the crossover delay, CT is charged by an internal
current source of approximately 1 mA. The comparator
output remains blanked until the voltage on CT reaches
approximately 3 volts.
When the device is disabled, via the ENABLE input,
CT is discharged to near ground. When the device is
re-enabled, CT is charged by an internal current source of
approximately 1 mA. The comparator output remains
blanked until the voltage on CT reaches approximately
3 volts.
The minimum recommended value for CT is
1000 pF. This value ensures that the blanking time is
sufficient to avoid false trips of the comparator under
normal operating conditions. For optimal regulation of the
load current, the above value for CT is recommended and
the value of RT can be sized to determine tOFF. For more
information regarding load current regulation, see below.
Load Current Regulation. Because the device operates
in a slow current-decay mode (2-quadrant PWM mode),
there is a limit to the lowest level that the PWM current
control circuitry can regulate load current. The limitation is
due to the minimum PWM duty cycle, which is a function of
the user-selected value of tOFF and the minimum on-time
pulse tON(min)max that occurs each time the PWM latch is
reset. If the motor is not rotating, as in the case of a
stepper motor in hold/detent mode, a brush dc motor when
stalled or at startup, the worst case value of current
regulation can be approximated by:
[(VBB – VSAT(SOURCE+SINK)) • tON(min)max] – (1.05 (VSAT(SINK) + VF) • tOFF)
I AVG
1.05 (tON(min)max + tOFF) • RLOAD


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