PDF CXA2153S Data sheet ( Hoja de datos )

Número de pieza	CXA2153S
Descripción	Preamplifier for High Resolution Computer Display
Fabricantes	Sony Corporation
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No Preview Available ! CXA2153S Preamplifier for High Resolution Computer Display Description The CXA2153S is a bipolar IC developed for high resolution computer displays. 30 pin SDIP (Plastic) Features • Built-in wide-band amplifier: 180MHz@–3dB (Typ.) • Input dynamic range: 1.0Vp-p (Typ.) • High gain preamplifier (15dB) • R, G and B incorporated in a single package (SDIP 30 pins) • I2C bus control Contrast control R/G/B drive control Brightness control OSD contrast control 4-channel DAC control output • Built-in gamma function • Built-in high-speed ABL blanking • Built-in sync separator for Sync on Green • Built-in blanking mixing function (with blanking level fixed at 0.4V) • Built-in OSD mixing function • Video period detection function • Built-in VBLK synchronous DAC refresh system Applications High resolution computer displays Absolute Maximum Ratings (Ta = 25°C, GND = 0V) • Supply voltage Vcc12 13 V Vcc5 5.5 V • Operating temperature Topr –20 to +75 °C • Storage temperature Tstg –65 to +150 °C • Allowable power dissipation PD 2.05 W • Pin voltage Vcc5 + 0.3V 1, 3, 4, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16, 17 (Pin) VREF (Pin 23) + 0.3V 18, 19, 20, 21, 25, 27, 29 (Pin) Recommended Operating Conditions Supply voltage Vcc12 12 ± 0.5 Vcc5 5 ± 0.25 V V Structure Bipolar silicon monolithic IC Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits. –1– E99X02A1Y-PS 1 page CXA2153S Pin No. Symbol Pin voltage 9 OSD_R 10 OSD_G 11 OSD_B Equivalent circuit VCC VCC VCC 9 10 30k 11 5k 5k Description OSD control input. VILMAX = 0.8V VIHMIN = 2.8V 12 SYNCOUT VCC VCC VCC VCC 12 200 100 20k 200 5k Sync separator output of Sync- on-green signal. I2C bus SOG off: Output at 0. Typ.: High = 4.2V Low = 0.2V (positive polarity) 13 CLP VCC VCC 13 30k Clamp pulse (positive polarity) input. VILMAX = 0.8V VIHMIN = 2.8V 14 BLK VCC VCC VCC 14 30k 5k 5k Blanking pulse input. Set the V blanking pulse width to 300µs or more. VILMAX = 1.2V VIHMIN = 4.7V –5– 5 Page I2C BUS Logic System No. Item 1 High level input voltage 2 Low level input voltage 3 Low level output voltage SDA during current inflow of 3mA 4 Maximum clock frequency 5 Minimum waiting time for data change 6 Minimum waiting time for data transfer start 7 Low level clock pulse width 8 High level clock pulse width 9 Minimum waiting time for start preparation 10 Minimum data hold time 11 Maximum data preparation time 12 Rise time 13 Fall time 14 Minimum waiting time for stop preparation CXA2153S Symbol Min. Typ. Max. Unit VIH 3.0 — 5.0 V VIL 0 — 1.5 V VOL 0 — 0.4 V fSCL 0 — 400 kHz tBUF 1.3 — — µs tHD; STA 0.6 — — µs tLOW 1.3 — — µs tHIGH 0.6 — — µs tSU; STA 0.6 — — µs tHD; DAT 0 — 900 ns tSU; DAT 100 — — ns tR —— 1 µs tF — — 300 ns tSU; STO 0.6 — — µs – 11 – 11 Page

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