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PDF CY7C164 Data sheet ( Hoja de datos )
| Número de pieza | CY7C164 | |
| Descripción | 16K x 4 Static RAM | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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66
CY7C164
CY7C166
Features
• High speed
— 15 ns
• Output enable (OE) feature (CY7C166)
• CMOS for optimum speed/power
• Low active power
— 633 mW
• Low standby power
— 110 mW
• TTL-compatible inputs and outputs
• Automatic power-down when deselected
Functional Description
The CY7C164 and CY7C166 are high-performance CMOS
static RAMs organized as 16,384 by 4 bits. Easy memory ex-
pansion is provided by an active LOW Chip Enable (CE) and
16K x 4 Static RAM
three-state drivers. The CY7C166 has an active LOW Output
Enable (OE) feature. Both devices have an automatic power-
down feature, reducing the power consumption by 65% when
deselected.
Writing to the device is accomplished when the Chip Enable
(CE) and Write Enable (WE) inputs are both LOW (and the
Output Enable (OE) is LOW for the CY7C166). Data on the
four input/output pins (I/O0 through I/O3) is written into the
memory location specified on the address pins (A0 through
A13).
Reading the device is accomplished by taking Chip Enable
(CE) LOW (and OE LOW for CY7C166), while Write Enable
(WE) remains HIGH. Under these conditions the contents of
the memory location specified on the address pins will appear
on the four data I/O pins.
The I/O pins stay in a high-impedance state when Chip Enable
(CE) is HIGH (or Output Enable (OE) is HIGH for CY7C166).
A die coat is used to insure alpha immunity.
Logic Block Diagram
INPUT BUFFER
A1
A2
AA34 256 x 64 x 4
AA56 ARRAY
A7
A8
COLUMN
DECODER
POWER
DOWN
]
Selection Guide
Maximum Access Time (ns)
Maximum Operating Current (mA)
Maximum Standby Current (mA)
Pin Configurations
DIP
Top View
SOJ
Top View
I/O3
I/O2
A5
A6
A7
A8
A9
A10
A11
A12
A13
CE
GND
1 22
2 21
3 20
4 19
5 18
6 7C164 17
7 16
8 15
9 14
10 13
11 12
VCC
A4
A3
A2
A1
A0
I/O3
I/O2
I/O1
I/O0
WE
C164–3
DIP/SOJ
Top View
A5
A6
A7
A8
A9
A10
A11
A12
A13
CE
NC
GND
1 24
2 23
3 22
4 21
5 20
6 7C164 19
7 18
8 17
9 16
10 15
11 14
12 13
VCC
A4
A3
A2
A1
A0
NC
I/O3
I/O2
I/O1
I/O0
WE
C164–2
I/O1
I/O0
CE
WE
(OE)
(7C166 ONLY)
A5
A6
A7
A8
A9
A10
A11
A12
A13
CE
OE
GND
1 24
2 23
3 22
4 21
5 20
6 7C166 19
7 18
8 17
9 16
10 15
11 14
12 13
VCC
A4
A3
A2
A1
A0
NC
I/O3
I/O2
I/O1
I/O0
WE
C164–4
C166–1
7C164-15
7C166-15
15
115
20
7C164-20
7C166-20
20
115
20
7C164-25
7C166-25
25
105
20
7C164-35
7C166-35
35
105
20
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
Document #: 38-05025 Rev. **
Revised August 24, 2001
1 page  
Switching Waveforms (continued)
Write Cycle No. 2 (CE Controlled) [8, 12, 13]
ADDRESS
CE
tSA
WE
DATA IN
tWC
tSCE
tAW
tPWE
tSD
DATAIN VALID
tHA
tHD
DATA I/O
HIGH IMPEDANCE
Note:
13. If CE goes HIGH simultaneously with WE HIGH, the output remains in a high-impedance state.
CY7C164
CY7C166
C164–10
Document #: 38-05025 Rev. **
Page 5 of 9
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet CY7C164.PDF ] | |
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