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What is DAC725KP?

This electronic component, produced by the manufacturer "Burr-Brown Corporation", performs the same function as "Dual 16-Bit DIGITAL-TO-ANALOG CONVERTER".


DAC725KP Datasheet PDF - Burr-Brown Corporation

Part Number DAC725KP
Description Dual 16-Bit DIGITAL-TO-ANALOG CONVERTER
Manufacturers Burr-Brown Corporation 
Logo Burr-Brown Corporation Logo 


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® DAC725
Dual 16-Bit
DIGITAL-TO-ANALOG CONVERTER
FEATURES
q COMPLETE DUAL VOUT DAC
q DOUBLE-BUFFERED INPUT REGISTER
q HIGH-SPEED DATA INPUT:
Serial or Parallel
q HIGH ACCURACY: ±0.003% Linearity Error
q 14-BIT MONOTONICITY OVER
TEMPERATURE
q PLASTIC PACKAGE
q CLEAR INPUT TO SET ZERO OUTPUT
DESCRIPTION
The DAC725 is a dual 16-bit DAC, complete with
internal reference and output op amps. The DAC725 is
designed to interface to an 8-bit microprocessor bus,
but can also be interfaced to wider buses. The hybrid
construction minimizes the digital feedthrough typi-
cally associated with products that combine the digital
bus interface circuitry with high-accuracy analog cir-
cuitry.
The 16-bit data word is loaded into either of the DACs
in two 8-bit bytes per 16-bit word. The versatility of
the control lines allows the data word to be directed to
either DAC, in any order. The voltage-out DACs are
dedicated to a bipolar output voltage of ±10V. The
output is immediately set to 0V when the Clear com-
mand is given. This feature, combined with the bus
interfacing and complete DAC circuitry, makes the
DAC725 ideal for automatic test equipment, power
control, servo systems, and robotics applications.
8-Bit
Data Bus
High
Byte
Low
Byte
8
D/A 16
Latch
8
16-
Bit
D/A
(A)
CS (A)
WR (A)
CLR
Control Logic
CS (B)
WR (B)
A0
A1
A2
High
Byte
Low
Byte
8
D/A 16
Latch
8
16-
Bit
D/A
(B)
International Airport Industrial Park • Mailing Address: PO Box 11400 • Tucson, AZ 85734 • Street Address: 6730 S. Tucson Blvd. • Tucson, AZ 85706
Tel: (520) 746-1111 • Twx: 910-952-1111 • Cable: BBRCORP • Telex: 066-6491 • FAX: (520) 889-1510 • Immediate Product Info: (800) 548-6132
© 1987 Burr-Brown Corporation
PDS-757D
Printed in U.S.A. August, 1993

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DAC725KP equivalent
0.03
0.025
0.02
0.015
0.01
0.005
0
1
–15V Supply
+15V Supply
+5V Supply
10 100 1k 10k
Power Supply Ripple Frequency (Hz)
100k
FIGURE 2. Power Supply Rejection Versus Power Supply
Ripple Frequency.
OPERATING INSTRUCTIONS
POWER SUPPLY CONNECTIONS
For optimum performance and noise rejection, power supply
decoupling capacitors should be added as shown in the
Connection Diagram. 1µF to 10µF tantalum capacitors should
be located close to the D/A converter.
EXTERNAL ZERO AND GAIN ADJUSTMENT
Zero and gain may be trimmed by installing external zero
and gain potentiometers. Connect these potentiometers as
shown in the Connection Diagram and adjust as described
below. TCR of the potentiometers should be 100ppm/°C or
less. The 3.9Mand 270kresistors (±20% carbon or
better) should be located close to the D/A converter to
prevent noise pickup. If it is not convenient to use these
high-value resistors, an equivalent “T” network, as shown in
Figure 3, may be substituted in place of the 3.9Mresistor.
A 0.001µF to 0.01µF low-leakage film capacitor should be
connected from Gain Adjust to Analog Common to prevent
noise pickup. Refer to Figure 4 for relationship of Offset and
Gain adjustments.
3.9M
180k
180k
10k
FIGURE 3. Equivalent Resistances.
Zero Adjustment
By loading the code 0000H, the DAC will force 0V. Offset
is adjusted by using the circuit of Figure 5. An alternate
method would be to use the CLR control to set the DAC to
0V. Zero calibration should be made before gain calibration.
Gain Adjustment
To adjust the gain of the DAC725, set the DAC to 7FFFH for
both DACs. Adjust the gain of each DAC to obtain the full
scale voltage of +9.99969V as shown in Table II.
DIGITAL
INPUT
CODE
BIPOLAR OUTPUT, ±10V
16 Bits
15 Bits
14 Bits
One LSB
7FFFH
8000H
305
+9.99969
–10
610
+9.99939
–10
1224
+9.99878
–10
TABLE II. Digital Input Codes.
UNITS
µV
V
V
INTERFACE LOGIC AND TIMING
The control logic functions are chip select (CSA or CSB),
write (WRA or WRB), latch enable (A0, A1, A2), and clear
(CLR). These pins provide the control functions for the micro-
processor interface. There is a write and a chip select for both
DACA and for DACB channels. This allows the 8-bit data
word to be latched from the data bus to the input latch or
from the input latch to the DAC latch, of DACA, DACB, or
both.
A0 A 1 A2 WR (A) CS (A) DESCRIPTION
110
101
100
011
010
001
XXX
XXX
0
0
0
0
0
1
1
0
0 DAC latch enabled, Channel A
0 Input latch high byte enabled, Channel A
0 High byte flows through to DAC, Channel A
0 Low byte latched from data bus, Channel A
0 Low byte flows through to DAC, Channel A
1 Serial input mode for byte latches
0 No data is latched
1 No data is latched
“1” or “0” indicates TTL Logic Level Channel A shown.
TABLE III. Truth Table of Data Transfers.
1LSB
Input = 8000H
+ Full Scale
Gain
Adjust
Rotates
the Line
Range of
Gain Adjust
Offset Adjust
Translates
the Line
Input = 7FFFH
Input = 0000H
Range and
Offset Adjust
– Full Scale
Digital Input
FIGURE 4. Relationship of Zero and Gain Adjustments
for the DAC725.
®
5 DAC725


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Featured Datasheets

Part NumberDescriptionMFRS
DAC725KPThe function is Dual 16-Bit DIGITAL-TO-ANALOG CONVERTER. Burr-Brown CorporationBurr-Brown Corporation

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