DAC8562FS Datasheet PDF - Analog Devices
| Part Number | DAC8562FS | |
| Description | +5 Volt/ Parallel Input Complete 12-Bit DAC | |
| Manufacturers | Analog Devices | |
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a
FEATURES
Complete 12-Bit DAC
No External Components
Single +5 Volt Operation
1 mV/Bit with 4.095 V Full Scale
True Voltage Output, ؎5 mA Drive
Very Low Power –3 mW
APPLICATIONS
Digitally Controlled Calibration
Servo Controls
Process Control Equipment
PC Peripherals
+5 Volt, Parallel Input
Complete 12-Bit DAC
DAC8562
FUNCTIONAL BLOCK DIAGRAM
REFOUT
VDD
DAC-8562
REF
12-BIT
DAC
12
DAC REGISTER
12
VOUT
AGND
DGND CE
DATA
CLR
GENERAL DESCRIPTION
The DAC8562 is a complete, parallel input, 12-bit, voltage out-
put DAC designed to operate from a single +5 volt supply. Built
using a CBCMOS process, these monolithic DACs offer the
user low cost, and ease-of-use in +5 volt only systems.
Included on the chip, in addition to the DAC, is a rail-to-rail
amplifier, latch and reference. The reference (REFOUT) is
trimmed to 2.5 volts, and the on-chip amplifier gains up the
DAC output to 4.095 volts full scale. The user needs only sup-
ply a +5 volt supply.
The DAC8562 is coded straight binary. The op amp output
swings from 0 to +4.095 volts for a one millivolt per bit resolu-
tion, and is capable of driving ± 5 mA. Built using low tempera-
ture-coefficient silicon-chrome thin-film resistors, excellent
linearity error over temperature has been achieved as shown be-
low in the linearity error versus digital input code plot.
Digital interface is parallel and high speed to interface to the
fastest processors without wait states. The interface is very sim-
ple requiring only a single CE signal. An asynchronous CLR in-
put sets the output to zero scale.
The DAC8562 is available in two different 20-pin packages,
plastic DIP and SOL-20. Each part is fully specified for opera-
tion over –40°C to +85°C, and the full +5 V ± 5% power supply
range.
For MIL-STD-883 applications, contact your local ADI sales
office for the DAC8562/883 data sheet which specifies opera-
tion over the –55°C to +125°C temperature range.
1
0.75
VDD = +5V
TA = –55°C, +25°C, +125°C
0.5
–55°C
0.25
0
–0.25
–0.5
–0.75
+25°C & +125°C
–1
0
1024
2048
3072
DIGITAL INPUT CODE — Decimal
4096
Figure 1. Linearity Error vs. Digital Input Code Plot
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
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DAC8562
OPERATION
The DAC8562 is a complete ready to use 12-bit digital-to-
analog converter. Only one +5 V power supply is necessary for
operation. It contains a voltage-switched, 12-bit, laser-trimmed
digital-to-analog converter, a curvature-corrected bandgap refer-
ence, a rail-to-rail output op amp, and a DAC register. The par-
allel data interface consists of 12 data bits, DB0–DB11, and a
active low CE strobe. In addition, an asynchronous CLR pin
will set all DAC register bits to zero causing the VOUT to be-
come zero volts. This function is useful for power on reset or
system failure recovery to a known state.
current is provided by a P channel pull-up device that can sup-
ply GND terminated loads, especially important at the –5%
supply tolerance value of 4.75 volts.
P-CH
VDD
N-CH
VOUT
D/A CONVERTER SECTION
The internal DAC is a 12-bit voltage-mode device with an out-
put that swings from AGND potential to the 2.5 volt internal
bandgap voltage. It uses a laser trimmed R-2R ladder which is
switched by N channel MOSFETs. The output voltage of the
DAC has a constant resistance independent of digital input
code. The DAC output (not available to the user) is internally
connected to the rail-to-rail output op amp.
AMPLIFIER SECTION
The internal DAC’s output is buffered by a low power con-
sumption precision amplifier. This low power amplifier contains
a differential PNP pair input stage which provides low offset
voltage and low noise, as well as the ability to amplify the zero-
scale DAC output voltages. The rail-to-rail amplifier is config-
ured in a gain of 1.6384 (= 4.095 V/2.5 V) in order to set the
4.095 volt full-scale output (1 mV/LSB). See Figure 3 for an
equivalent circuit schematic of the analog section.
REFOUT
2.5V
BANDGAP
REFERENCE
VOLTAGE SWITCHED 12-BIT
R-2R D/A CONVERTER
2R
RAIL-TO-RAIL
OUTPUT
AMPLIFIER
BUFFER
R VOUT
R2
2R
R1
R
2R AV = 4.096/2.5
= 1.636V/V
SPDT
N ch FET
SWITCHES
2R
2R
Figure 3. Equivalent DAC8562 Schematic of
Analog Portion
The op amp has a 16 µs typical settling time to 0.01%. There
are slight differences in settling time for negative slewing signals
versus positive. See the oscilloscope photos in the Typical Per-
formances section of this data sheet.
AGND
Figure 4. Equivalent Analog Output Circuit
Figures 5 and 6 in the typical performance characteristics sec-
tion provide information on output swing performance near
ground and full scale as a function of load. In addition to resis-
tive load driving capability, the amplifier has also been carefully
designed and characterized for up to 500 pF capacitive load
driving capability.
REFERENCE SECTION
The internal 2.5 V curvature-corrected bandgap voltage refer-
ence is laser trimmed for both initial accuracy and low tempera-
ture coefficient. The voltage generated by the reference is
available at the REFOUT pin. Since REFOUT is not intended
to drive external loads, it must be buffered–refer to the applica-
tions section for more information. The equivalent emitter fol-
lower output circuit of the REFOUT pin is shown in Figure 3.
Bypassing the REFOUT pin is not required for proper opera-
tion. Figure 7 shows broadband noise performance.
POWER SUPPLY
The very low power consumption of the DAC8562 is a direct
result of a circuit design optimizing use of the CBCMOS pro-
cess. By using the low power characteristics of the CMOS for
the logic, and the low noise, tight matching of the complemen-
tary bipolar transistors, good analog accuracy is achieved.
For power-consumption sensitive applications it is important to
note that the internal power consumption of the DAC8562 is
strongly dependent on the actual logic-input voltage-levels
present on the DB0–DB11, CE and CLR pins. Since these in-
puts are standard CMOS logic structures, they contribute static
power dissipation dependent on the actual driving logic VOH and
VOL voltage levels. The graph in Figure 9 shows the effect on to-
tal DAC8562 supply current as a function of the actual value of
input logic voltage. Consequently for optimum dissipation use
of CMOS logic versus TTL provides minimal dissipation in the
static state. A VINL = 0 V on the DB0–DB11 pins provides the
lowest standby dissipation of 600 µA with a +5 V power supply.
OUTPUT SECTION
The rail-to-rail output stage of this amplifier has been designed
to provide precision performance while operating near either
power supply. Figure 4 shows an equivalent output schematic of
the rail-to-rail amplifier with its N channel pull down FETs that
will pull an output load directly to GND. The output sourcing
REV. A
–5–
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| Information | Total 16 Pages | |
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