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What is AN8035?

This electronic component, produced by the manufacturer "Panasonic Semiconductor", performs the same function as "3-pin/ positive output/ low dropout voltage regulator (50 mA type)".


AN8035 Datasheet PDF - Panasonic Semiconductor

Part Number AN8035
Description 3-pin/ positive output/ low dropout voltage regulator (50 mA type)
Manufacturers Panasonic Semiconductor 
Logo Panasonic Semiconductor Logo 


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AN8000/AN8000M Series
3-pin Positive Output Low Dropout Voltage Regulator (50mA Type)
s Overview
The AN8000 series is 3-pin low-dropout fixed positive
output monolithic voltage regulators. Since thier power
consumption can be minimized, they are suitable for bat-
tery stabilizing power supply and reference voltage. Thir-
teen types of output voltage are available ; 2V, 2.5V, 3V,
3.5V (TO-92 only) , 4V, 4.5V, 5V, 6V, 7V, 8V, 8.5V, 9V,
and 10V.
s Features
• Input/output voltage difference : 0.3V (max.)
• Output current of up to 50mA
• Low bias current ; 0.6mA (typ.)
• Output voltage ; 2V, 2.5V, 3V, 3.5V (TO-92 only) , 4V,
4.5V, 5V, 6V, 7V, 8V, 8.5V, 9V, and 10V.
• Over-voltage protective circuit built-in.
AN8000 Series
5.0±0.2
4.0±0.2
Unit:mm
2.54
+ 0.2
0.45 – 0.1
2.3±0.2
2 31
(Bottom View)
1 : Input
2 : Output
3 : GND
TO-92 Plastic Package (SSIP003-P-0000)
AN8000M Series
4.6max.
1.8max.
Unit:mm
1.6max.
s Block Diagram
0.48max.
0.58max.
1.5
3.0
123
0.44max.
1 : Output
2 : GND
3 : Input
3-pin Mini Power type Plastic Package (TO-243) (HSIP003-P-0000B)
Starter
Voltage
Reference
+
Error
Amp.
Current
Limiter
1 32
3 2 –+ 1
VI
COUT
R2
R1
VO
: TO-92
: TO-243
R1=5k
CIN=0.33µF
COUT=10µF

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AN8035 equivalent
s Electrical Characteristics (Ta=25˚C)
· AN8007/AN8007M (7V Type)
Parameter
Symbol
Condition
min typ max Unit
Output voltage
Line regulation
Load regulation
VO
REGIN
REGL
Tj=25˚C
VI=7.5 to 13V, Tj=25˚C
IO=1 to 40mA, Tj=25˚C
IO=1 to 50mA, Tj=25˚C
6.72
7 7.28
V
6.5 70 mV
14 50 mV
31 60 mV
Minimum I/O voltage difference
VDIF (min.)
VI=6.8V, IO=20mA, Tj=25˚C
VI=6.8V, IO=50mA, Tj=25˚C
0.07 0.2
0.13 0.3
V
V
Bias current
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
Ibias
RR
Vno
VO/Ta
IO=0mA, Tj=25˚C
VI=8 to 10V, f=120Hz
f=10Hz to 100kHz
Tj=–30 to+125˚C
0.7
50 62
120
0.35
1.3 mA
dB
µV
mV/˚C
Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, VI=8V, IO=20mA, CO=10µF
· AN8008/AN8008M (8V Type)
Parameter
Symbol
Condition
min typ max Unit
Output voltage
Line regulation
Load regulation
VO
REGIN
REGL
Tj=25˚C
VI=8.5 to 14V, Tj=25˚C
IO=1 to 40mA, Tj=25˚C
IO=1 to 50mA, Tj=25˚C
7.68
8 8.32
V
7.5 80 mV
15 55 mV
34 65 mV
Minimum I/O voltage difference
VDIF (min.)
VI=7.8V, IO=20mA, Tj=25˚C
VI=7.8V, IO=50mA, Tj=25˚C
0.07 0.2
0.14 0.3
V
V
Bias current
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
Ibias
RR
Vno
VO/Ta
IO=0mA, Tj=25˚C
VI=9 to 11V, f=120Hz
f=10Hz to 100kHz
Tj=–30 to+125˚C
0.7 1.3 mA
49 61
dB
135 µV
0.4 mV/˚C
Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, VI=9V, IO=20mA, CO=10µF
· AN8085/AN8085M (8.5V Type)
Parameter
Symbol
Condition
min typ max Unit
Output voltage
Line regulation
Load regulation
VO
REGIN
REGL
Tj=25˚C
VI=9 to 14.5V, Tj=25˚C
IO=1 to 40mA, Tj=25˚C
IO=1 to 50mA, Tj=25˚C
8.16 8.50 8.84
V
8.3 90 mV
16 60 mV
36 70 mV
Minimum I/O voltage difference
VDIF (min.)
VI=8.3V, IO=20mA, Tj=25˚C
VI=8.3V, IO=50mA, Tj=25˚C
0.07 0.2
0.14 0.3
V
V
Bias current
Ripple rejection ratio
Output noise voltage
Output voltage temperature coefficient
Ibias
RR
Vno
VO/Ta
IO=0mA, Tj=25˚C
VI=9.5 to 11.5V, f=120Hz
f=10Hz to 100kHz
Tj=–30 to+125˚C
0.8
48 60
140
0.43
1.4 mA
dB
µV
mV/˚C
Note1) The specified condition Tj=25˚C means that the test should be conducted with each test time reduced (within 10ms) so that
the drift in characteristic value due to a temperature rise at chip junction can be ignored.
Note2) Unless otherwise specified, VI=9.5V, IO=20mA, CO=10µF


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