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PDF CXP88152 Data sheet ( Hoja de datos )

Número de pieza CXP88152
Descripción CMOS 8-bit Single Chip Microcomputer
Fabricantes Sony Corporation 
Logotipo Sony Corporation Logotipo



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CXP88152/88160
CMOS 8-bit Single Chip Microcomputer
Description
The CXP88152/88160 is a CMOS 8-bit micro-
computer which consists of A/D converter, serial
interface, timer/counter, time base timer, high
precision timing pattern generation circuits, PWM
output, PWM for tuner, VISS/ VASS circuit, 32kHz
timer/counter, remote control receiving circuit,
fluorescent display panel (FDP) controller/driver,
VSYNC separator and the measurement circuit
which measure signals of capstan FG and drum
FG/PG and other servo systems, as well as basic
configurations like 8-bit CPU, ROM, RAM and I/O
port. They are integrated into a single chip.
Also, CXP88152/88160 provides sleep/stop
function which enables to lower power consumption
and ultra-low speed instruction mode in 32kHz
operation.
100 pin QFP (Plastic)
Structure
Silicon gate CMOS IC
Features
A wide instruction set (213 instructions) which cover various types of data
— 16-bit arithmetic/multiplication and division/boolean bit operation instructions
Minimum instruction cycle 250ns at 16MHz operation
122µs at 32kHz operation
Incorporated ROM capacity 52K bytes (CXP88152)
60K bytes (CXP88160)
Incorporated RAM capacity 1296 bytes (including fluorescent display area)
Peripheral function
— A/D converter
8 bits, 8 channels, successive approximation system
(Conversion time of 20µs/16MHz)
— Serial interface
Incorporated 8-bit, 8-stage FIFO for data
(Auto transfer for 1 to 8 bytes), 1 channel
8-bit clock sync type, 1 channel
— Timer
8-bit timer/counter, 2 channels
19-bit time base timer
32kHz timer/counter
— High precision timing pattern generation PPG 8 pins 32-stage programmable circuit
RTG 5 pins, 2 channels
— PWM/DA gate output
12 bits, 2 channels (Repetitive frequency 62.5kHz/16MHz)
DA gate pulse output, 13 bits, 4 channels
— Servo input control
Capstan FG, Drum FG/PG, CTL input
— VSYNC separator
— FRC capture unit
Incorporated 26-bit and 8-stage FIFO
— PWM output
14-bit, 1 channel
— VISS/VASS circuit
Pulse duty auto detection circuit
— 32kHz timer/event counter
32kHz oscillation circuit, ultra-low speed instruction mode
— Remote control reception circuit
8-bit pulse measurement counter, 6-stage FIFO
— Fluorescent display panel controller/driver Maximum 148-segment display possible
Hardware key scan function (Maximum 16 × 3 key matrix available)
Dimmer function
High voltage drive output (40V)
Incorporated pull-down resistor (Mask option)
— Tri-state output
PPG 1 pin, RTG 1 pin, output 8 pins
— Pseudo HSYNC output function
— High speed head switching circuit
Interruption
22 factors, 15 vectors, multi-interruption possible
Standby mode
SLEEP/STOP
Package
100-pin plastic QFP
Piggyback/evaluation chip
CXP88100A 100-pin ceramic GFP
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E95324-ST

1 page




CXP88152 pdf
CXP88152/88160
Symbol
PG0/CFG
PG1/DFG
PG2/DPG
PG3/
PBCTL/EC1
PG4/
SYNC0/EC2
PG5/SYNC1
PG6/EXI0
PG7/EXI1
PH0/KR0
to
PH2/KR2
PI1/RMC
PI2/PWM
PI3/TO/
DDO/ADJ
PI4/INT1/
NMI/CS0
PI5/SCK0
PI6/SO0
PI7/SI0
EXTAL
XTAL
TEX
TX
RST
MP
VFDP
AVDD
AVREF
AVss
VDD
Vss
NC
I/O
Input/Input
Input/Input
Input/Input
Input/Input/Input
Input/Input/Input
Input/Input
Input/Input
Input/Input
I/O/Input
I/O/Input
I/O/Input
I/O/Input
I/O/Input/
Input/Input
I/O/I/O
I/O/Output
I/O/Input
Input
Output
Input
Output
Input
Input
Input
Description
Capstan FG input pin.
Drum FG input pin.
Drum PG input pin.
(Port G)
8-bit input port.
(8 pins)
Playback CTL input pin.
Composite sync signal input pin.
External event
input pin for
timer/counter.
External event
input pin for
timer/counter.
External input pin for FRC capture unit.
(Port H)
3-bit I/O port.
(3 pins)
Key return input signal for key scanning at FDP
segment signal. (3 pins)
Remote control reception circuit input pin.
14-bit PWM output pin.
(Port I)
7-bit I/O port.
I/O can be set
in a unit of
single bits.
(7 pins)
Timer/counter, CTL duty detection, 32kHz oscillation
adjustment output pin.
Input pin to request external interruption,
non-maskable interruption and for serial chip select
(CH0). Active when falling edge.
Serial clock (CH1) I/O pin.
Serial data (CH1) output pin.
Serial data (CH1) input pin.
Connecting pin of crystal oscillator for system clock.
When supplying the external clock, input the external clock to EXTAL
pin and input opposite phase clock to XTAL pin.
Connecting pin of crystal oscillator for 32kHz timer clock.
When used as event counter, input to TEX pin and leave TX pin open.
(In this time, feedback resistor is not removed.)
System reset pin of active “L” level.
Test mode pin. Always connect to GND.
FPD voltage supply pin when specifying internal resistor by mask
option.
Positive power supply pin of A/D converter.
Reference voltage input pin of A/D converter.
GND pin of A/D converter.
Positive power supply pin.
GND pin. Connect both Vss pins to GND.
Not connected. Under normal operation, connect to VDD.
–5–

5 Page





CXP88152 arduino
CXP88152/88160
Pin
PI2/PWM
PI3/TO/
DDO/ADJ
2 pins
PI1/RMC
PI4/INT1/
NMI/CS0
PI7/SI0
3 pins
PI5/SCK0
PI6/SO0
2 pins
PH0/KR0
to
PH2/KR2
3 pins
Port I
Circuit format
Port I function
select
PI2: From 14-bit PWM,
timer/counter
PI3: From CTL duty detection
circuit, 32kHz timer
MPX
Port I data
Port I direction
Data bus
RD (Port I)
Port I
Port I data
IP
Port I direction
Data bus
RD (Port I)
PI1: To remote control circuit
PI4: To interruption circuit
PI7: To serial CH0
IP
Schmitt input
Port I
Port I function
select
From
serial CH0
Port I data
Port I direction
Data bus
Port H
RD (Port I)
PI5: To serial CH0
Port H data
MPX
MPX
IP
Note)
P15 is schmitt input
Schmitt input
Port H direction
Data bus
RD (Port H)
Key input signal
IP
– 11 –
When reset
Hi-Z
Hi-Z
Hi-Z
Hi-Z

11 Page







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