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PDF HM-6504 Data sheet ( Hoja de datos )

Número de pieza HM-6504
Descripción 4096 x 1 CMOS RAM
Fabricantes Intersil Corporation 
Logotipo Intersil Corporation Logotipo



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HM-6504/883
March 1997
4096 x 1 CMOS RAM
Features
Description
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Low Power Standby . . . . . . . . . . . . . . . . . . . 125µW Max
• Low Power Operation . . . . . . . . . . . . . 35mW/MHz Max
• Data Retention . . . . . . . . . . . . . . . . . . . . . . . at 2.0V Min
• TTL Compatible Input/Output
• Three-State Output
• Standard JEDEC Pinout
• Fast Access Time. . . . . . . . . . . . . . . . . . 120/200ns Max
• 18 Pin Package for High Density
• On-Chip Address Register
The HM-6504/883 is a 4096 x 1 static CMOS RAM
fabricated using self-aligned silicon gate technology. The
device utilizes synchronous circuitry to achieve high perfor-
mance and low power operation.
On-chip latches are provided for addresses, data input and
data output allowing efficient interfacing with microprocessor
systems. The data output can be forced to a high impedance
state for use in expanded memory arrays.
Gated inputs allow lower operating current and also elimi-
nate the need for pull up or pull down resistors. The
HM-6504/883 is a fully static RAM and may be maintained in
any state for an indefinite period of time.
Data retention supply voltage and supply current are guaran-
teed over temperature.
• Gated Inputs - No Pull Up or Pull Down Resistors
Required
Ordering Information
PACKAGE TEMPERATURE RANGE
200ns
CERDIP
-55oC to +125oC
HM1-6504B/883
300ns
HM1-6504/883
PKG. NO
F18.3
Pinout
HM-6504/883 (CERDIP)
TOP VIEW
A0 1
A1 2
A2 3
A3 4
A4 5
A5 6
Q7
W8
GND 9
18 VCC
17 A6
16 A7
15 A8
14 A9
13 A10
12 A11
11 D
10 E
PIN DESCRIPTION
A Address Input
E Chip Enable
W Write Enable
D Data Input
Q Data Output
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-134
File Number 2993.1

1 page




HM-6504 pdf
HM-6504/883
TABLE 3. HM-6504/883 ELECTRICAL PERFORMANCE SPECIFICATIONS
HM-6504S/883
LIMITS
PARAMETER
Input Capacitance
SYMBOL
CI
Output
Capacitance
CO
Chip Enable Output (3)
Disable Time
Chip Enable Output (4)
Disable Time
TELQX
TEHQZ
Write Enable Read (12) TWHEL
Mode Setup Time
High Level Output
Voltage
VOHL
CONDITIONS
VCC = Open, f = 1MHz, All
Measurements Referenced
to Device Ground
VCC = Open, f = 1MHz, All
Measurements Referenced
to Device Ground
VCC = 4.5 and 5.5V
VCC = 4.5 and 5.5V
HM-6504S/883
VCC = 4.5 and 5.5V
HM-6504B/883
VCC = 4.5 and 5.5V
HM-6504/883
VCC = 4.5 and 5.5V
VCC = 4.5V, IO = -100µA
NOTE
1
TEMPERATURE
TA = +25oC
MIN
-
1 TA = +25oC -
1 -55oC TA +125oC 5
1 -55oC TA +125oC -
1 -55oC TA +125oC -
1 -55oC TA +125oC -
1 -55oC TA +125oC 0
1 -55oC TA +125oC VCC -
0.4
MAX
8
10
-
50
80
100
-
-
UNITS
pF
pF
ns
ns
ns
ns
ns
V
NOTE:
1. The parameters listed in Table 3 are controlled via design, or process parameters are characterized upon initial design and after major
process and/or design changes.
f
TABLE 4. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
SUBGROUPS
Initial Test
100%/5004
-
Interim Test
100%/5004
1, 7, 9
PDA
100%/5004
1
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Group A
Samples/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Groups C & D
Samples/5005
1, 7, 9
6-138

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