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PDF HV57708X Data sheet ( Hoja de datos )
| Número de pieza | HV57708X | |
| Descripción | 64-Channel Serial to Parallel Converter | |
| Fabricantes | Supertex Inc | |
| Logotipo |  |
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Supertex inc.
HV57708
32MHz, 64-Channel Serial to Parallel Converter
with Push-Pull Outputs
Features
►►HVCMOS® technology
►►5.0V CMS Logic
►►Output voltage up to +80V
►►Low power level shifting
►►32MHz equivalent data rate
►►Latched data outputs
►►Foreward and reverse shifting options (DIR pin)
►►Diode to VPP allows efficient power recovery
►►Outputs may be hot switched
General Description
The HV57708 is a low voltage serial to high voltage parallel
converter with push-pull outputs. The device has been
designed for use as a driver for EL displays. It can also be
used in any application requiring multiple output high voltage
current sourcing and sinking capability such as driving
plasma panels, vacuum fluorescent displays, or large matrix
LCD displays.
The device has 4 parallel 16-bit registers, permitting data
rates 4x the speed of one (they are clocked together). There
are also 64 latches and control logic to perform the polarity
select and blanking of the outputs. HVOUT1 is connected to
the first stage of the first shift register through the polarity
and blanking logic. Data is shifted through the shift registers
on the logic low to high transition of the clock. The DIR pin
causes CCW shifting when connected to GND, and CW
shifting when connected to VDD. A data output buffer is
provided for cascading devices. This output reflects the
current status of the last bit of the shift register (HVOUT64).
Operation of the shift register is not affected by the LE (latch
enable), BL (blanking), or the POL (polarity) inputs. Transfer
of data from the shift registers to the latches occurs when
the LE input is high. The data in the latches is stored when
the LE is low.
Functional Block Diagram
DO1 DO2
DI4 DI3
DO3
DI2
DO4
DI1
VDD
LE
BL
POL
VPP
DIR
SR1
HVOUT15
9
•
•
•
HVOUT61
CLK
SR2
SR3
HVOUT26
10
•
•
•
HVOUT62
HVOUT37
11
•
•
•
HVOUT63
SR4
HVOUT48
12
•
•
•
HVOUT64
Doc.# DSFP-HV57708
A061913
DO4 DO3 DO2 DO1
GND
Note:
DI1 DI2 DI3 DI4
Each SR (shift register) provides 16 outputs. SR1 supplies every fourth output starting with 1;
SR2 supplies every fourth output with 2, etc.
Supertex inc.
www.supertex.com
1 page  
Function Table
Function
Data
HV57708
CLK
Inputs
LE BL
POL
Outputs
DIR Shift Reg HV Outputs
Data Out
All O/P high
X
XXL LX
-
H
All O/P low
X
XX LHX
-
L
O/P normal
X
XXHHX
- No inversion
O/P inverted
Data falls
through
(latches
transparent)
X
L
H
L
H
XXH L X
_
_↑ H H H X
_
_↑ H H H X
_
_↑ H H L X
_
_↑ H H L X
-
L
H
L
H
Inversion
L
H
H
L
X X L H H X * Stored Data
Data stored/
latches loaded
X
XLHLX
*
Inversion of
stored data
_
DI/O1-4A
_↑
_
H
H
H
H
Qn→Qn+1
New H or L
I/O relation
DI/O1-4A
_↑
_
L
H
H
H Qn→Qn+1 Previous H or L
DI/O1-4B
_↑
_
L
H
H
L Qn→Qn-1 Previous H or L
DI/O1-4B
_↑
H
H
H
L
Qn→Qn-1
New H or L
Note:
* = dependent on previous stage’s state. See Pin configuration for DIN and DOUT pin designation for CW and CCW shift.
-
-
-
-
-
-
-
-
-
-
DI/O1-4B
DI/O1-4B
DI/O1-4A
DI/O1-4A
Shift Register Operation
HVOUT32
•
•
•
•
•
HVOUT2
HVOUT1
Pin
DIR = H; CW (HVOUT1 → HVOUT64)
DIR = L; CCW (HVOUT64 → HVOUT1)
DIR = H
DIR = L
1 SR1 4
2 SR1 3
3 SR1 2
4 SR1 1
HVOUT33
•
•
•
•
•
HVOUT63
HVOUT64
25 26 27 28
36 37 38 39
Doc.# DSFP-HV57708
A061913
Supertex inc.
5 www.supertex.com
5 Page | ||
| Páginas | Total 7 Páginas | |
| PDF Descargar | [ Datasheet HV57708X.PDF ] | |
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