HUF75542S3S Datasheet PDF - Intersil Corporation
Part Number | HUF75542S3S | |
Description | 75A/ 80V/ 0.014 Ohm/ N-Channel/ UltraFET Power MOSFETs | |
Manufacturers | Intersil Corporation | |
Logo | ||
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Data Sheet
HUF75542P3, HUF75542S3S
June 2000 File Number 4845.2
75A, 80V, 0.014 Ohm, N-Channel,
UltraFET Power MOSFETs
Packaging
JEDEC TO-220AB
JEDEC TO-263AB
SOURCE
DRAIN
GATE
DRAIN (FLANGE)
HUF75542P3
Symbol
GATE
SOURCE
DRAIN
(FLANGE)
HUF75542S3S
D
G
S
Features
• Ultra Low On-Resistance
- rDS(ON) = 0.014Ω, VGS = 10V
• Simulation Models
- Temperature Compensated PSPICE® and SABER©
Electrical Models
- Spice and SABER© Thermal Impedance Models
- www.intersil.com
• Peak Current vs Pulse Width Curve
• UIS Rating Curve
Ordering Information
PART NUMBER
PACKAGE
BRAND
HUF75542P3
TO-220AB
75542P
HUF75542S3S
TO-263AB
75542S
NOTE: When ordering, use the entire part number. Add the suffix T
to obtain the variant in tape and reel, e.g., HUF75542S3ST.
Absolute Maximum Ratings TC = 25oC, Unless Otherwise Specified
HUF75542P3, HUF75542S3S UNITS
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDSS
Drain to Gate Voltage (RGS = 20kΩ) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDGR
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS
Drain Current
Continuous (TC = 25oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Continuous (TC = 100oC, VGS = 10V) (Figure 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID
Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .IDM
Pulsed Avalanche Rating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .UIS
80
80
±20
75
58
Figure 4
Figures 6, 14, 15
V
V
V
A
A
Power Dissipation . . .
Derate Above 25oC
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PD
...
230
1.54
W
W/oC
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ, TSTG
-55 to 175
oC
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .TL
Package Body for 10s, See Techbrief TB334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Tpkg
300
260
oC
oC
NOTE:
1. TJ = 25oC to 150oC.
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
1 CAUTION: These devices are sensitive to electrostatic discharge. Follow proper ESD Handling Procedures.
UltraFET™ is a trademark of Intersil Corporation. PSPICE® is a registered trademark of MicroSim Corporation.
1-888-INTERSIL or 321-724-7143 | Intersil and Design is a trademark of Intersil Corporation. | Copyright © Intersil Corporation 2000
SABER© is a Copyright of Analogy Inc.
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HUF75542P3, HUF75542S3S
Typical Performance Curves (Continued)
1.2
ID = 250µA
1.1
10000
VGS = 0V, f = 1MHz
CISS = CGS + CGD
1.0 1000 COSS ≅ CDS + CGD
0.9
0.8
-80
-40 0 40 80 120 160
TJ, JUNCTION TEMPERATURE (oC)
200
FIGURE 11. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
CRSS = CGD
100
0.1
1 10
VDS, DRAIN TO SOURCE VOLTAGE (V)
80
FIGURE 12. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
10
VDD = 40V
8
6
4
WAVEFORMS IN
DESCENDING ORDER:
2 ID = 75A
ID = 50A
ID = 25A
0
0 20 40 60 80 100
Qg, GATE CHARGE (nC)
NOTE: Refer to Intersil Application Notes AN7254 and AN7260.
FIGURE 13. GATE CHARGE WAVEFORMS FOR CONSTANT GATE CURRENT
Test Circuits and Waveforms
VARY tP TO OBTAIN
REQUIRED PEAK IAS
VGS
tP
0V
RG
VDS
L
DUT
+
VDD
-
IAS
0.01Ω
FIGURE 14. UNCLAMPED ENERGY TEST CIRCUIT
tP
IAS
BVDSS
VDS
VDD
0
tAV
FIGURE 15. UNCLAMPED ENERGY WAVEFORMS
5
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Information | Total 11 Pages | |
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