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PDF ADG408 Data sheet ( Hoja de datos )

Número de pieza ADG408
Descripción High Performance Analog Multiplexers
Fabricantes Analog Devices 
Logotipo Analog Devices Logotipo




1. ADG408






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Data Sheet
LC2MOS 4-/8-Channel
High Performance Analog Multiplexers
ADG408/ADG409
FEATURES
44 V supply maximum ratings
VSS to VDD analog signal range
Low on resistance (100 Ω maximum)
Low power (ISUPPLY < 75 μA)
Fast switching
Break-before-make switching action
Plug-in replacement for DG408/DG409
APPLICATIONS
Audio and video routing
Automatic test equipment
Data acquisition systems
Battery-powered systems
Sample-and-hold systems
Communication systems
GENERAL DESCRIPTION
The ADG408/ADG409 are monolithic CMOS analog multiplexers
comprising eight single channels and four differential channels,
respectively. The ADG408 switches one of eight inputs to a
common output as determined by the 3-bit binary address lines
A0, A1, and A2. The ADG409 switches one of four differential
inputs to a common differential output, as determined by the
2-bit binary address lines A0 and A1. An EN input on both devices
is used to enable or disable the device. When the device is disabled,
all channels are switched off.
The ADG408/ADG409 are designed on an enhanced LC2MOS
process that provides low power dissipation yet gives high
switching speed and low on resistance. Each channel conducts
equally well in both directions when on and has an input signal
range that extends to the supplies. In the off condition, signal levels
up to the supplies are blocked. All channels exhibit break-before-
make switching action, preventing momentary shorting when
switching channels. Inherent in the design is low charge injection
for minimum transients when switching the digital inputs.
The ADG408/ADG409 are improved replacements for the
DG408/DG409 analog multiplexers.
FUNCTIONAL BLOCK DIAGRAMS
ADG408
S1
ADG409
S1A
DA
S4A
D
S1B
DB
S8 S4B
1-OF-8
DECODER
1-OF-4
DECODER
A0 A1 A2 EN
A0 A1 EN
Figure 1.
PRODUCT HIGHLIGHTS
1. Extended Signal Range. The ADG408/ADG409 are
fabricated on an enhanced LC2MOS process, giving an
increased signal range that extends to the supply rails.
2. Low Power Dissipation.
3. Low RON.
4. Single-Supply Operation. For applications where the
analog signal is unipolar, the ADG408/ADG409 can be
operated from a single rail power supply. The parts are
fully specified with a single 12 V power supply and remain
functional with single supplies as low as 5 V.
Rev. D
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2001–2015 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com

1 page




ADG408 pdf
Data Sheet
ADG408/ADG409
Parameter
Channel-to-Channel Crosstalk
CS (Offf )
CD (Off )
ADG408
ADG409
CD, CS (On)
ADG408
ADG409
POWER REQUIREMENTS
IDD
IDD
B Version
−40°C to
+25°C +85°C
85
11
40
20
54
34
1
5
100
200 500
T Version
+25°C
−55°C to
+125°C
85
11
40
20
54
34
1
5
100
200 500
Unit
dB typ
pF typ
pF typ
pF typ
pF typ
pF typ
μA typ
μA max
μA typ
μA max
1 Guaranteed by design, not subject to production test.
Test Conditions/Comments
RL = 1 kΩ, f = 100 kHz; see Figure 27
f = 1 MHz
f = 1 MHz
f = 1 MHz
VIN = 0 V, VEN = 0 V
VIN = 0 V, VEN = 2.4 V
Rev. D | Page 5 of 15

5 Page





ADG408 arduino
Data Sheet
ADG408/ADG409
TEST CIRCUITS
IDS
V1
S
VS
D
RON = V1/IDS
Figure 18. On Resistance
VDD
VSS
VDD
S1
VSS
S2
S8
VS
GND
D
EN 0.8V
ID (OFF)
A
VD
Figure 20. ID (Off)
IS (OFF)
A
VS VD
VDD
VSS
VDD
S1
VSS
S2 D
S8 EN 0.8V
GND
VDD
VSS
VDD
VSS
S1
S8
VS
GND
D
ID (ON)
EN 2.4V
A
VD
Figure 19. IS (Off)
Figure 21. ID (On)
3V
ADDRESS
DRIVE (VIN)
0V
tTRANSITION
OUTPUT
50%
90%
ttrf
<
<
20ns
20ns
50%
VIN
tTRANSITION
90%
50
2.4V
VDD
VSS
VDD
A0
A1
A2
VSS
S1
S2–S7
VS1
S8 VS8
ADG4081
OUTPUT
EN D
GND
300
1SIMILAR CONNECTION FOR ADG409.
Figure 22. Switching Time of Multiplexer, tTRANSlTlON
35pF
3V
ADDRESS
DRIVE (VIN)
0V
OUTPUT
VDD
VSS
80%
80%
tOPEN
VIN 50
VDD
A0
A1
A2
VSS
S1
S2–S7
VS
S8
ADG4081
OUTPUT
2.4V
EN
D
GND
300
35pF
1SIMILAR CONNECTION FOR ADG409.
Figure 23. Break-Before-Make Delay, tOPEN
Rev. D | Page 11 of 15

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