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PDF AADG812YRU Data sheet ( Hoja de datos )
| Número de pieza | AADG812YRU | |
| Descripción | 0.5 CMOS 1.65 V to 3.6 V Quad SPST Switches | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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FEATURES
0.5 Ω typ on resistance
0.8 Ω max on resistance at 125°C
1.65 V to 3.6 V operation
Automotive temperature range: –40°C to +125°C
High current carrying capability: 300 mA continuous
Rail-to-rail switching operation
Fast switching times: <25 ns
Typical power consumption < 0.1 µW
APPLICATIONS
Cellular phones
MP3 players
Power routing
Battery-powered systems
PCMCIA cards
Modems
Audio and video signal routing
Communications systems
GENERAL DESCRIPTION
The ADG811, ADG812, and ADG813 are low voltage CMOS
devices containing four independently selectable switches.
These switches offer ultralow on resistance of less than 0.8 Ω
over the full temperature range. The digital inputs can handle
1.8 V logic with a 2.7 V to 3.6 V supply.
These devices contain four independent single-pole/single-
throw (SPST) switches. The ADG811 and ADG812 differ only
in that the digital control logic is inverted. The ADG811
switches are turned on with a logic low on the appropriate
control input, while a logic high is required to turn on the
switches of the ADG812. The ADG813 contains two switches
whose digital control logic is similar to the ADG811, while the
logic is inverted on the other two switches.
Each switch conducts equally well in both directions when on
and has an input signal range that extends to the supplies. The
ADG813 exhibits break-before-make switching action.
The ADG811, ADG812, and ADG813 are fully specified for
3.3 V, 2.5 V, and 1.8 V supply operation. They are available in a
16-lead TSSOP package.
<0.5 Ω CMOS 1.65 V to 3.6 V
Quad SPST Switches
ADG811/ADG812/ADG813
FUNCTIONAL BLOCK DIAGRAMS
S1 S1 S1
IN1 IN1 IN1
D1 D1 D1
S2 S2 S2
IN2 IN2 IN2
ADG811
D2
S3
ADG812
D2
S3
ADG813
D2
S3
IN3 IN3 IN3
D3 D3 D3
S4 S4 S4
IN4 IN4 IN4
D4 D4 D4
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1.
PRODUCT HIGHLIGHTS
1. <0.8 Ω over full temperature range of –40°C to +125°C.
2. Single 1.65 V to 3.6 V operation.
3. Operational with 1.8 V CMOS logic.
4. High current handling capability (300 mA continuous
current at 3.3 V).
5. Low THD+N (0.02% typ).
Rev. A
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved.
1 page  
ADG811/ADG812/ADG813
Table 3. VDD = 1.65 V to 1.95 V, GND = 0 V, unless otherwise noted1
Parameter
+25°C –40°C to +85°C –40°C to +125°C
ANALOG SWITCH
Analog Signal Range
0 V to VDD
On Resistance (RON)
1
1.4 2.2
2.2
2.5 4
4
On Resistance Match between
Channels (∆RON)
0.1
LEAKAGE CURRENTS
Source Off Leakage IS (OFF)
±0.2
±1 ±5
±30
Drain Off Leakage ID (OFF)
±0.2
±1 ±5
±30
Channel On Leakage ID, IS (ON)
±0.2
±1 ±9
±60
DIGITAL INPUTS
Input High Voltage, VINH
0.65VDD
Input Low Voltage, VINL
0.35VDD
Input Current, IINL or IINH
0.005
±0.1
CIN, Digital Input Capacitance
6
DYNAMIC CHARACTERISTICS2
tON 27
35 36
37
tOFF 6
89
10
Break-Before-Make Time Delay (tBBM) 20
(ADG813 only)
5
Charge Injection
15
Off Isolation
–67
Channel-to-Channel Crosstalk
–90
Total Harmonic Distortion (THD + N) 0.14
Insertion Loss
–3 dB Bandwidth
CS (OFF)
CD (OFF)
CD, CS (ON)
POWER REQUIREMENTS
IDD
–0.08
90
32
38
60
0.003
1.0
4
Unit
V
Ω typ
Ω max
Ω max
Ω typ
nA typ
nA max
nA typ
nA max
nA typ
nA max
V min
V max
µA typ
µA max
pF typ
ns typ
ns max
ns typ
ns max
ns typ
ns min
pC typ
dB typ
dB typ
%
dB typ
MHz typ
pF typ
pF typ
pF typ
µA typ
µA max
Test Conditions/Comments
VDD = 1.8 V, VS = 0 V to VDD, IS = 10 mA;
Figure 18
VDD = 1.65 V, VS = 0 V to VDD, IS = 10 mA
VDD = 1.65 V, VS = 0.7 V, IS = 10 mA
VDD = 1.95 V
VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V;
Figure 19
VS = 0.6 V/1.65 V, VD = 1.65 V/0.6 V;
Figure 19
VS = VD = 0.6 V or 1.65 V; Figure 20
VIN = VINL or VINH
RL = 50 Ω, CL = 35 pF
VS = 1.5 V/ 0 V; Figure 21
RL = 50 Ω, CL = 35 pF
VS = 1.5 V; Figure 21
RL = 50 Ω, CL = 35 pF
VS1 = VS2 = 1 V; Figure 22
VS = 1 V, RS = 0 Ω, CL = 1 nF;
Figure 23
RL = 50 Ω, CL = 5 pF, f = 100 kHz;
Figure 24
RL = 50 Ω, CL = 5 pF, f = 100 kHz;
Figure 26
RL = 32 Ω, f = 20 Hz to 20 kHz,
VS = 1.2 V p-p
RL = 50 Ω, CL = 5 pF, f = 100 kHz
RL = 50 Ω, CL = 5 pF; Figure 25
VDD = 1.95 V
Digital inputs = 0 V or 1.95 V
1Temperature range for the Y version is –40°C to +125°C.
2Guaranteed by design, not subject to production test.
Rev. A | Page 5 of 16
5 Page 
ADG811/ADG812/ADG813
TEST CIRCUITS
IDS
V1
SD
VS RON = V1/IDS
Figure 18. On Resistance
IS (OFF)
S
A
VS
ID (OFF)
D
A
VD
Figure 19. Off Leakage
NC S
ID (ON)
D
A
VD
Figure 20. On Leakage
VDD
0.1µF
VDD
SD
VOUT
VS IN
RL CL
50Ω 35pF
GND
ADG811
50%
VIN
VIN
ADG812 50%
VOUT
90%
tON
50%
50%
90%
tOFF
Figure 21. Switching Times
VDD
0.1µF
VS1 S1
VS2 S2
IN1, IN2
VIN
VDD
GND
D1
D2
RL2
50Ω
VOUT2
CL2
35pF
RL1
50Ω
VOUT1
CL1
35pF
VIN 0V
50%
VOUT
80%
tBBM
Figure 22. Break-Before-Make Time Delay, tBBM (ADG813)
50%
80%
tBBM
RS
VS
VDD
VDD
SD
IN
GND
VOUT
CL
1nF
SW ON
VIN
SW OFF
VOUT
∆VOUT
QINJ = CL × ∆VOUT
Figure 23. Charge Injection
Rev. A | Page 11 of 16
11 Page | ||
| Páginas | Total 16 Páginas | |
| PDF Descargar | [ Datasheet AADG812YRU.PDF ] | |
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