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PDF AM29F010B Data sheet ( Hoja de datos )
| Número de pieza | AM29F010B | |
| Descripción | 1 Megabit (128 K x 8-bit) CMOS 5.0 Volt-only/ Uniform Sector Flash Memory | |
| Fabricantes | Advanced Micro Devices | |
| Logotipo |  |
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Am29F010B
Data Sheet
The following document contains information on Spansion memory products.
Continuity of Specifications
There is no change to this data sheet as a result of offering the device as a Spansion product. Any
changes that have been made are the result of normal data sheet improvement and are noted in the
document revision summary.
For More Information
Please contact your local sales office for additional information about Spansion memory solutions.
Publication Number Am29F010B_00 Revision C Amendment 7 Issue Date October 31, 2006
1 page  
DATA SHEET
TABLE OF CONTENTS
General Description . . . . . . . . . . . . . . . . . . . . . . . . 2
Product Selector Guide . . . . . . . . . . . . . . . . . . . . . 4
Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Connection Diagrams . . . . . . . . . . . . . . . . . . . . . . . 5
Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Logic Symbol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Ordering Information . . . . . . . . . . . . . . . . . . . . . . . 6
Standard Products .................................................................... 6
Device Bus Operations . . . . . . . . . . . . . . . . . . . . . . 7
Table 1. Am29F010B Device Bus Operations .................................7
Requirements for Reading Array Data ..................................... 7
Writing Commands/Command Sequences .............................. 7
Program and Erase Operation Status ...................................... 8
Standby Mode .......................................................................... 8
Output Disable Mode ................................................................ 8
Table 2. Am29F010B Sector Addresses Table .................................8
Autoselect Mode ....................................................................... 8
Table 3. Am29F010B Autoselect Codes (High Voltage Method) ......9
Sector Protection/Unprotection ................................................. 9
Hardware Data Protection ........................................................ 9
Command Definitions . . . . . . . . . . . . . . . . . . . . . . 10
Reading Array Data ................................................................ 10
Reset Command ..................................................................... 10
Autoselect Command Sequence ............................................ 10
Byte Program Command Sequence ....................................... 10
Figure 1. Program Operation ..........................................................11
Chip Erase Command Sequence ........................................... 11
Sector Erase Command Sequence ........................................ 11
Erase Suspend/Erase Resume Commands ........................... 12
Figure 2. Erase Operation ...............................................................12
Table 4. Am29F010B Command Definitions ...................................13
Write Operation Status . . . . . . . . . . . . . . . . . . . . . 14
DQ7: Data# Polling ................................................................. 14
Figure 3. Data# Polling Algorithm ...................................................14
DQ6: Toggle Bit I .................................................................... 14
Reading Toggle Bit DQ6 ......................................................... 15
Figure 4. Toggle Bit Algorithm ........................................................ 15
DQ5: Exceeded Timing Limits ................................................ 15
DQ3: Sector Erase Timer ....................................................... 16
Table 5. Write Operation Status ..................................................... 16
Absolute Maximum Ratings . . . . . . . . . . . . . . . . 17
Figure 5. Maximum Negative Overshoot Waveform ...................... 17
Figure 6. Maximum Positive Overshoot Waveform ........................ 17
Operating Ranges . . . . . . . . . . . . . . . . . . . . . . . . 17
DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 18
Test Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . 20
Figure 7. Test Setup ....................................................................... 20
Table 6. Test Specifications ........................................................... 20
Key to Switching Waveforms . . . . . . . . . . . . . . . 20
AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . 21
Figure 8. Read Operations Timings ............................................... 21
Erase and Program Operations .............................................. 22
Figure 9. Program Operation Timings ............................................ 23
Figure 10. Chip/Sector Erase Operation Timings .......................... 23
Figure 11. Data# Polling Timings (During Embedded Algorithms) . 24
Figure 12. Toggle Bit Timings (During Embedded Algorithms) ...... 24
Erase and Program Operations .............................................. 25
Figure 13. Alternate CE# Controlled Write Operation Timings ...... 26
Erase and Programming Performance . . . . . . . 26
Latchup Characteristic . . . . . . . . . . . . . . . . . . . . 27
TSOP Pin Capacitance . . . . . . . . . . . . . . . . . . . . 27
PLCC and PDIP Pin Capacitance . . . . . . . . . . . . 27
Data Retention . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Physical Dimensions . . . . . . . . . . . . . . . . . . . . . . 28
PD 032—32-Pin Plastic DIP ................................................... 28
PL 032—32-Pin Plastic Leaded Chip Carrier ......................... 29
TS 032—32-Pin Standard Thin Small Outline Package ......... 30
Revision Summary . . . . . . . . . . . . . . . . . . . . . . . . 31
October 31, 2006 Am29F010B_00_C7
Am29F010B
3
5 Page 
DATA SHEET
Table 3. Am29F010B Autoselect Codes (High Voltage Method)
Description
A16 A13
A8
A5
to to to to
CE# OE# WE# A14 A10 A9 A7 A6 A2 A1
Manufacturer ID: AMD
Device ID: Am29F010B
L L H X X VID X L X L
L L H X X VID X L X L
Sector Protection Verification
L L H SA X VID X L X H
L = Logic Low = VIL, H = Logic High = VIH, SA = Sector Address, X = Don’t care.
DQ7
to
A0 DQ0
L 01h
H 20h
01h
(protected)
L
00h
(unprotected)
Sector Protection/Unprotection
The hardware sector protection feature disables both
program and erase operations in any sector. The hard-
ware sector unprotection feature re-enables both
program and erase operations in previously protected
sectors.
Sector protection/unprotection must be implemented
using programming equipment. The procedure re-
quires a high voltage (VID) on address pin A9 and the
control pins. Details on this method are provided in a
supplement, publication number 22337. Contact an
AMD representative to obtain a copy of the appropriate
document.
The device is shipped with all sectors unprotected.
AMD offers the option of programming and protecting
sectors at its factory prior to shipping the device
through AMD’s ExpressFlash™ Service. Contact an
AMD representative for details.
It is possible to determine whether a sector is protected
or unprotected. See “Autoselect Mode” for details.
Hardware Data Protection
The command sequence requirement of unlock cycles
for programming or erasing provides data protection
against inadvertent writes (refer to the Command Defi-
nitions table). In addition, the following hardware data
protection measures prevent accidental erasure or pro-
gramming, which might otherwise be caused by
spurious system level signals during VCC power-up and
power-down transitions, or from system noise.
Low VCC Write Inhibit
When VCC is less than VLKO, the device does not ac-
cept any write cycles. This protects data during VCC
power-up and power-down. The command register and
all internal program/erase circuits are disabled, and the
device resets. Subsequent writes are ignored until VCC
is greater than VLKO. The system must provide the
proper signals to the control pins to prevent uninten-
tional writes when VCC is greater than VLKO.
Write Pulse “Glitch” Protection
Noise pulses of less than 5 ns (typical) on OE#, CE# or
WE# do not initiate a write cycle.
Logical Inhibit
Write cycles are inhibited by holding any one of OE# =
VIL, CE# = VIH or WE# = VIH. To initiate a write cycle,
CE# and WE# must be a logical zero while OE# is a
logical one.
Power-Up Write Inhibit
If WE# = CE# = VIL and OE# = VIH during power up, the
device does not accept commands on the rising edge
of WE#. The internal state machine is automatically
reset to reading array data on power-up.
October 31, 2006 Am29F010B_00_C7
Am29F010B
9
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet AM29F010B.PDF ] | |
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