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What is H0500KC25E?

This electronic component, produced by the manufacturer "IXYS", performs the same function as "Fast Symmetrical Gate Turn-Off Thyristor".


H0500KC25E Datasheet PDF - IXYS

Part Number H0500KC25E
Description Fast Symmetrical Gate Turn-Off Thyristor
Manufacturers IXYS 
Logo IXYS Logo 


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WESTCODE
An IXYS Company
Date:- 4 Aug, 2004
Data Sheet Issue:- 2
Fast Symmetrical Gate Turn-Off Thyristor
Type H0500KC25#
Absolute Maximum Ratings
VDRM
VRSM
VRRM
VRSM
VOLTAGE RATINGS
Repetitive peak off-state voltage, (note 1)
Non-repetitive peak off-state voltage, (note 1)
Repetitive peak reverse voltage
Non-repetitive peak reverse voltage
MAXIMUM
LIMITS
2500
2600
100-2000
100-2000
UNITS
V
V
V
V
ITGQM
Ls
IT(AV)M
IT(RMS)
ITSM
ITSM2
I2t
di/dtcr
PFGM
PRGM
IFGM
VRGM
toff
ton
Tjop
Tstg
RATINGS
Maximum peak turn-off current, (note 2)
Snubber loop inductance, ITM=ITGQM, (note 2)
Mean on-state current, Tsink=55°C (note 3)
Nominal RMS on-state current, 25°C (note 3)
Peak non-repetitive surge current tp=10ms
Peak non-repetitive surge current, (Note 4)
I2t capacity for fusing tp=10ms
Critical rate of rise of on-state current, (note 5)
Peak forward gate power
Peak reverse gate power
Peak forward gate current
Peak reverse gate voltage (note 6)
Minimum permissible off-time, ITM=ITGQM, (note 2)
Minimum permissible on-time
Operating temperature range
Storage temperature range
Notes:-
1) VGK=-2Volts.
2) Tj=125°C, VD=80%VDM, VDM<VDRM, diGQ/dt=20A/µs, CS=3µF.
3) Double-side cooled, single phase; 50Hz, 180° half-sinewave.
4) Half-sinewave, tp=2ms
5) For di/dt>1000A/µs, consult factory.
6) May exceed this value during turn-off avalanche period.
MAXIMUM
LIMITS
500
0.3
540
280
3.0
5.4
45
1000
160
5
100
18
60
10
-40 to +125
-40 to +150
UNITS
A
µH
A
A
kA
kA
kA2s
A/µs
W
kW
A
V
µs
µs
°C
°C
Data Sheet. Type H0500KC25# Issue 2
Page 1 of 15
August, 2004

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H0500KC25E equivalent
WESTCODE An IXYS Company
Fast Symmetrical Gate Turn-Off Thyristor type H0500KC25#
2 Characteristics
2.1 Instantaneous on-state voltage
Measured using a 500µs square pulse, see also the curves of figure 2 for other values of ITM.
2.2 Latching and holding current
These are considered to be approximately equal and only the latching current is measured, type test only
as outlined below. The test circuit and wave diagrams are given in diagram 4. The anode current is
monitored on an oscilloscope while VD is increased, until the current is seen to flow during the un-gated
period between the end of IG and the application of reverse gate voltage. Test frequency is 100Hz with IGM
& IG as for td of characteristic data.
IG
IGM
100µs
Gate current
100µs
15V
Anode current
R1
Unlatched
unlatched condition
CT
Gate-drive
DUT
C1 Vs
Latched
Anode current
Latched condition
Diagram 4, Latching test circuit and waveforms.
2.3 Critical dv/dt
The gate conditions are the same as for 1.1, this characteristic is for off-state only and does not relate to
dv/dt at turn-off. The measurement, type test only, is conducted using the exponential ramp method as
shown in diagram 5. It should be noted that GTO thyristors have a poor static dv/dt capability if the gate is
open circuit or RGK is high impedance. Typical values: - dv/dt<30V/µs for RGK>10.
Diagram 5, Definition of dV/dt.
2.4 Off-state leakage.
For IDRM & IRRM see notes 1.1 & 1.2 for gate leakage IGK, the off-state gate circuit is required to sink this
leakage and still maintain minimum of –2 Volts. See diagram 6.
Data Sheet. Type H0500KC25# Issue 2
Diagram 6.
Page 5 of 15
August, 2004


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