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PDF EV2A16A Data sheet ( Hoja de datos )
| Número de pieza | EV2A16A | |
| Descripción | 256K x 16-bit 3.3V Asynchronous Magnetoresistive RAM | |
| Fabricantes | e2v | |
| Logotipo |  |
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Datasheet
EV2A16A
256K x 16‐bit 3.3V Asynchronous
Magnetoresistive RAM
Features
• Single 3.3V Power Supply
• Industrial Temperature Range (–40°C to 110°C) and Military Temperature Range
(–55°C to 125°C)
• Symmetrical High‐speed Read and Write with Fast Access Time (35 ns)
• Flexible Data Bus Control: 8 bit or 16 bit Access
• Equal Address and Chip‐enable Access Times
• Automatic Data Protection with Low‐voltage Inhibit Circuitry to Prevent Writes on Power Loss
• All Inputs and Outputs are Transistor‐transistor Logic (TTL) Compatible
• Fully Static Operation
• Full Nonvolatile Operation with 20 Years Minimum Data Retention
Introduction
The EV2A16A is a 4,194,304‐bit magnetoresistive random access memory (MRAM) device organized as 262,144 words of 16 bits. The
EV2A16A is equipped with chip enable (E), write enable (W), and output enable (G) pins, allowing for significant system design
flexibility without bus contention. Because the EV2A16A has separate byte‐enable controls (LB and UB), individual bytes can be
written and read.
MRAM is a nonvolatile memory technology that protects data in the event of power loss and does not require periodic refreshing. The
EV2A16A is the ideal memory solution for applications that must permanently store and retrieve critical data quickly.
The EV2A16A is available in a 400‐mil, 44‐lead plastic small‐outline TSOP type‐II package RoHS compliant (MSL3 according to Jedec
standard) with an industry‐standard center power and ground SRAM pinout.
The EV2A16A is available in Industrial (–40°C to 110°C) and Military (–55°C to +125°C) temperature ranges.
e2v semiconductors SAS 2015
Visit our website: www.e2v.com
for the latest version of the datasheet
0918F–HIREL–07/15
1 page  
EV2A16A
2.2 Power‐up and Power‐down Sequencing
The MRAM is protected from write operations whenever VDD is less than VWI. As soon as VDD exceeds VDD(min),
there is a startup time of 2 ms before read or write operations can start. This time allows memory power supplies
to stabilize.
The E and W control signals should track VDD on power up to VDD – 0.2 V or VIH (whichever is lower) and remain
high for the startup time. In most systems, this means that these signals should be pulled up with a resistor so
that signal remains high if the driving signal is Hi‐Z during power up. Any logic that drives E and W should hold the
signals high with a power‐on reset signal for longer than the startup time.
During power loss or brownout where VDD goes below VWI, writes are protected and a startup time must be
observed when power returns above VDD(min).
Figure 2‐1. Power Up and Power Down Diagram
VWI VDD
2 ms
STARTUP
READ/WRITE
INHIBITED
NORMAL
OPERATION
VIH
E
VIH
BROWNOUT or POWER LOSS
2 ms
RECOVER
READ/WRITE
INHIBITED
W
NORMAL
OPERATION
Table 2‐3. DC Characteristics
Parameter
Input leakage current
Output leakage current
Output low voltage
(IOL = +4 mA)
(IOL = +100 µA)
Output high voltage
(IOH = –4 mA)
(IOH = –100 µA)
Symbol
Ilkg(I)
Ilkg(O)
VOL
VOH
Min
–
–
–
2.4
VDD – 0.2
Typical
–
–
–
–
Max
±1
±1
0.4
VSS + 0.2
–
Unit
µA
µA
V
V
e2v semiconductors SAS 2015
0918F–BDC–07/15
5
5 Page 
Figure 3‐7. Write Cycle Timing 3 (LB/UB Controlled)
A (Address)
E (Chip Enable)
W (Write Enable
UB,LB (Byte Enable)
tAVBL
D (Data In)
Q (Data Out)
Hi-Z
tAVAV
tAVEH
EV2A16A
tBHAX
tBLEH
tBLWH
tDVBH
Data Valid
Hi-Z
tBHDX
e2v semiconductors SAS 2015
0918F–BDC–07/15
11
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet EV2A16A.PDF ] | |
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