S29C51002B Datasheet PDF - SyncMOS
Part Number | S29C51002B | |
Description | 2 MEGABIT / 5 VOLT CMOS FLASH MEMORY | |
Manufacturers | SyncMOS | |
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S29C51002T/S29C51002B
2 MEGABIT (262,144 x 8 BIT)
5 VOLT CMOS FLASH MEMORY
Features
s 256Kx8-bit Organization
s Address Access Time: 70, 90, 120, 150 ns
s Single 5V ± 10% Power Supply
s Sector Erase Mode Operation
s 16KB Boot Block (lockable)
s 512 bytes per Sector, 512 Sectors
– Sector-Erase Cycle Time: 10ms (Max)
– Byte-Write Cycle Time: 35ms (Max)
s Minimum 10,000 Erase-Program Cycles
s Low power dissipation
– Active Read Current: 20mA (Typ)
– Active Program Current: 30mA (Typ)
– Standby Current: 100mA (Max)
s Hardware Data Protection
s Low VCC Program Inhibit Below 3.5V
s Self-timed write/erase operations with end-of-cy-
cle detection
– DATA Polling
– Toggle Bit
s CMOS and TTL Interface
s Available in one versions
– S29C51002T (Top Boot Block)
s Packages:
– 32-pin Plastic DIP
– 32-pin TSOP-I
– 32-pin PLCC
Description
TheS29C51002T/S29C51002B is a high speed
262,144 x 8 bit CMOS flash memory. Writing or
erasing the device is done with a single 5 Volt
power supply. The device has separate chip enable
CE, write enable WE, and output enable OE
controls to eliminate bus contention.
The S29C51002T/S29C51002B offers a combi-
nation of: Boot Block with Sector Erase/Write
Mode. The end of write/erase cycle is detected by
DATA Polling of I/O7 or by the Toggle Bit I/O6.
The S29C51002T/S29C51002B features a
sector erase operation which allows each sector to
be erased and reprogrammed without affecting
data stored in other sectors. The device also
supports full chip erase.
Boot block architecture enables the device to
boot from a protected sector located either at the
top (S29C51002T) or the bottom (S29C51002B).
All inputs and outputs are CMOS and TTL
compatible.
The S29C51002T/S29C51002B is ideal for
applications that require updatable code and data
storage.
S29C51002T/S29C51002B V1.0 May 2002
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SyncMOS Technologies Inc.
S29C51002T/S29C51002B
AC Electrical Characteristics
(over all temperature ranges)
Read Cycle
Parameter
Name
tRC
tAA
tACS
tOE
tCLZ
tOLZ
tDF
tOH
Parameter
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
CE Low to Output Active
OE Low to Output Active
OE or CE High to Output in High Z
Output Hold from Address Change
2 MEGABIT (262,144 x 8 BIT)
5 VOLT CMOS FLASH MEMORY
-70 -90 -12 -15
Min. Max. Min. Max. Min. Max. Min. Max. Unit
70 — 90 — 120 — 150 — ns
— 70 — 90 — 120 — 150 ns
— 70 — 90 — 120 — 150 ns
— 35 — 45 — 60 — 75 ns
0 — 0 — 0 — 0 — ns
0 — 0 — 0 — 0 — ns
0 30 0 40 0 50 0 60 ns
0 — 0 — 0 — 0 — ns
Program (Erase/Program) Cycle
Parameter
Name Parameter
tWC
tAS
tAH
tCS
tCH
tOES
tOEH
tWP
tWPH
tDS
tDH
tWHWH1
tWHWH2
tWHWH3
Write Cycle Time
Address Setup Time
Address Hold Time
CE Setup Time
CE Hold Time
OE Setup Time
OE High Hold Time
WE Pulse Width
WE Pulse Width High
Data Setup Time
Data Hold Time
Programming Cycle
Sector Erase Cycle
Chip Erase Cycle
-70 -90 -12 -15
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Unit
70 — — 90 — — 120 — — 150 — — ns
0 — — 0 — — 0 — — 0 — — ns
45 — — 45 — — 50 — — 50 — — ns
0 — — 0 — — 0 — — 0 — — ns
0 — — 0 — — 0 — — 0 — — ns
0 — — 0 — — 0 — — 0 — — ns
0 — — 0 — — 0 — — 0 — — ns
35 — — 45 — — 50 — — 50 — — ns
20 — — 30 — — 35 — — 35 — — ns
30 — — 30 — — 30 — — 30 — — ns
0 — — 0 — — 0 — — 0 — — ns
— — 35 — — 35 — — 35 — — 35 ms
— — 10 — — 10 — — 10 — — 10 ms
— — 3.0 — — 3.0 — — 3.0 — — 3.0 sec
S29C51002T/S29C51002B V1.0 May 2002
5
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Information | Total 16 Pages | |
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