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Número de pieza | M5M5118FP-15 | |
Descripción | 16K-Bit CMOS Static RAM | |
Fabricantes | Mitsubishi | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de M5M5118FP-15 (archivo pdf) en la parte inferior de esta página. Total 5 Páginas | ||
No Preview Available ! MITSUBISHI LSI.
M5M5118FP, -15
18384-BIT (2048-WORD BY 8-BIT) CMOS STATIC RAM
DESCRIPTION
The M5M5118FP series of 2048-word by 8-bit asynchro-
nous sificon gate CM05 static RAM operates on a single 5V
power supply and is designed for easy use in applications
requiring battery back-up_
Two chip select inputs, 51 and 52, are available to pro-
vide the minimum standby current with battery back-up_
The series is packaged in a small 24-pin plastic OIL flat
package_
FEATURES
Type name
Access time
(max)
M5M5118FP-15
M5M5118FP
lS0ns
200ns
Current consu,mPtion
Active
(maxi
Stand-by
(max)
SOmA
lS.uA
PIN CONFIGURATION (TOP VIEW)
Al - 1
ADDRESS
INPUTS
2. Vee (SV)
I23 ~ As
I22 ~ A. ADDR ESS INPUTS
WRITE CONTROL
INPUT
~ Si CHIP SELECT INPUT
,. ~ AlO ADDRESS INPUT
, 52~ CHIP SELECT INPUT
1_
1DATA DO, - •
INPUTSI D02 - '0
15 _
OUTPUTS D03 _ 11
1-
(ov) GND """"'-_ _ _....1r- _
DQ7
OQ6
DOs
DQ4
DATA
INPUTSI
OUTPUTS
• 5ingle 5V power supply.
• External clock and refresh operation not required.
• Data can be held with 2V supply voltage.
• All inputs and outputs are directly TTL compatible_
• All outputs are 3-state with OR-tie capability.
• Easy expansion of memory capacity with chip select
signal.
• Common input/output for data pins
APPLICATIONS
Battery drive, small-capacity memory units with battery
back-up
Outline 24P2W
FUNCTION
The M5M5118FP series has a 2048-word by 8-bit configura-
tion_ It operates on a single 5Vsupply and its inputs/
outputs are directly TTL comp~tible_ Its completely static
circuitry obviates the need for external clock and refresh
operations and makes it very easy to use. The data of the
DO pin are written when the address is designated by
address signals Ao - Ala, the 51 and 52 signals turn low-
level. and the Wsignal is set low_
When for the reading operation the W signal is set high.
the 51 and 52 signals are set low. pin DO is settothe output
BLOCK DIAGRAM
Al
A,
A,
ADDRESS INPUTS
2048-WORD X 8-BIT
RAM
(128 ROWS X
128 COLUMNS)
I-+,------<!Q) DO.
DATA
INPUTS/OUTPUTS
WRITE CONTROL INPUT Vi ~'I--;:::r)------I---------.J
CHIP SELECT ~INPUTS 1 ~'~ittl}---L----------.J
_s'~-l~~)- _ _ _ _ _ _ _ _ _ _ _--.J
Vee (SV)
1 OND (OV)
L---_ _-'- _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _----'
4-28
• -MITSUBISHI
""ELECTRIC
\
1 page MITSUBISHI LSls
M5M5118FP, ·15
16384-BIT (2048-WORD BY 8-BIT) CMOS STATIC RAM
Write cycle (8 control)
tew
Ao-AlO
001-008
(DATA IN)
001-008
(DATA OUT)
Note 4: Test conditions
Input pulse level- 0.4 "" 2.4V
Input pulse risetime and faHtime: 10ns
Load: 1TTL. CL = 100pF
Reference level: 1.5V
tW(W)
INote 61
tsu (OJ
DATA IN STABLE
Note 5: Hatching,indicates the don't care inputs.
6: Writing is performed while S and iN are in the low·level
overlap- period.
7: The output is kept in the high-impedance state when Vii
falls simultaneously with, or before, the S fall.
8 An reverse-phase signal should not be supplied when pin
DQ is in the output mode.
POWER-DOWN CHARACTERISTICS
Vee
4-32
• MITSUBISHI
"'ELECTRIC
5 Page |
Páginas | Total 5 Páginas | |
PDF Descargar | [ Datasheet M5M5118FP-15.PDF ] |
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