M5M5116FP Datasheet PDF - Mitsubishi
Part Number | M5M5116FP | |
Description | 16K-Bit CMOS Static RAM | |
Manufacturers | Mitsubishi | |
Logo | ||
There is a preview and M5M5116FP download ( pdf file ) link at the bottom of this page. Total 5 Pages |
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MSMSI16FP, -15
16384-BIT (2048-WORD BY 8-BIT) CMOS STATIC RAM
DESCRIPTION
The M5M5116FP series of 2048-word by 8-bit asynchro-
nous silicon gate CMOS static RAM operates on a single 5V
power supply and is designed for easy use in applications
requiring battery backup.
Two chip select inputs are available: S2 provides the
minimum standby current with battery back·up while SI
enables high-speed memory access.
The series is packaged in a small 24-pin plastic DI L flat
package.
FEATURES
Type name
Access time
(max)
M5M5116FP-15 150ns
M5M5116FP
200ns
S";" access
time
(max)
80ns
100ns
Current consumption
Active
(max)
Stand-by
(max)
SOmA
15i'A
• Single 5V power supply.
• External clock and refresh operation not required.
• Data can be held with 2V supply voltage.
• All inputs and outputs are directly TTL compatible.
• All outputs are 3-state with OR-tie capability.
• Easy expansion of memory capacity with chip select
signal.
• Common input!output for data pins.
APPLICATIONS
Battery drive, small-capacity memory units with battery
back·up
PIN CONFIGURATION (TOP VIEW)
ADDRESS
INPUTS A3
A2
Al
Ao
iDATA DO,
INPUTS/ D02
OUTPUTS D03
(OV) GND
Vee (5V)
23 - As I[ ADDRESS INPUTS
22 - A9
21 - Vi )%RpIJi CONTROL
20 - 51 CHIP SELECT INPUT
19 - A 10 ADDRESS INPUT
5218 - CHIP SELECT INPUT
17 - DOs
DATA
INPUTS/
OUTPUTS
Outline 24P2W
FUNCTION
The M5M5116FP series has a 2048-word by 8-bit configura-
tion. It operates on a single 5V supply and its inputs!
outputs are directly TTL compatible. Its completely static
circuitry obviates the need for external clock and refresh
operations and makes it very easy to use.
The data of the DQ pin are written when the address is
designated by address signals Ao - A IO , the 5;" and S2
signals turn low-level, and the W signal is set low.
When for the reading operation the W signal is set high,
BLOCK DIAGRAM
'ADDRESS INPUTS
- - -- - - - - -
- ----,
co
w
0
14
0
~
128
0
S
0
co
2048~WORD
X 8~BIT RAM
(128 ROWS X
128 COLUMNS)
co
w
~
1-+++f+.-~(15 006
@)007
I-+++++-I+..---.@ DO!!
DATA
INPUTS/OUTPUTS
I
,
I
WRITE CONTROL INPUT
II _S; 18
CHIP SELECT INPUTS
s,
L -_ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ _ __
• MITSUBISHI
4-8 ~ELECTRIC
|
|
MITSUBISHI LSls
MsMsI16FP, -15
163.4-BIT (2048-WORD BY ...IT) CMOS STATIC RAM
Write cycle (5 control)
tow
w
DOl-DOa
(DATA IN)
DO,-DOa
(DATA OUT)
Note 4- Test conditions
Input pulse level 0.4"'" 2.4V
Input pulse risetime and falltime" 10ns
Load: 1 TTL, CL " 100pF
Reference level: 1.5V
tW(W)
(Note 6)
DATA IN STABLE
Note 5: Hatching indicates the don't care inputs.
6 Writing is performed while Sand Ware in the
low-level overlap period.
7: The output is kept in the high-impedance state
when TN falls simultaneously with, or before, the
Sfalls.
8: A reverse-phase signal should not be supplied when
DQ is in the outPut mode,
POWER-DOWN CHARACTERISTICS
Vee
VCC(PO}
4-12
.• MITSUBISHI
.... ELECTRIC
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Information | Total 5 Pages | |
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