DataSheet.es    


PDF MH6408AD-15 Data sheet ( Hoja de datos )

Número de pieza MH6408AD-15
Descripción 512K-Bit DRAM
Fabricantes Mitsubishi 
Logotipo Mitsubishi Logotipo



Hay una vista previa y un enlace de descarga de MH6408AD-15 (archivo pdf) en la parte inferior de esta página.


Total 11 Páginas

No Preview Available ! MH6408AD-15 Hoja de datos, Descripción, Manual

MITSUBISHI LSls
MH6408AD-15
524 288-BIT(65 536-WORD BY 8-BIT)DYNAMIC RAM
DESCRIPTION
The MH6408AD is 65536 word x 8 bit dynamic RAM and
consists of eight industry standard 64K x 1 dynamic RAMs
in leadless chip carrier.
The mounting of leadless chip carriers on a ceramic
single in-line package provides any application where high
densities and large quantities of memory are required.
FEATURES
• Performance ran ges
Part No.
MH6408AO-15
Access time
(max)
(ns)
150
Cycle time
(min)
(ns)
260
Power dissipation
(typl
ImWI
1200
• Utilizes industry standard 64K RAMs in leadless chip
carriers
• 30 pins Single In-line Package
• Single +5V (±1 0%) supply operation
• Low standby power dissipation 176mW(max)
• Low operating power dissipation:
MH6408AD-15 1.9W (max)
• All inputs are directly TTL compatible
• All outputs are three-state and directly TTL compatible
• Includes (O.22}.LF x 6) decoupling capacitors
• 128 refresh cycles (every 2ms) A7 Pin is not need for
refresh
• Pin 13 controls automatic - and self-refresh mode.
APPLICATION
• Main memory unit for computers
• Refresh memory
PIN DONFIGURATION (TOP VIEW)
(OVI
ROW ADDRESS
STROBE INPUT
-COLUMN ADDRESS
STROBE INPUT
-WRITE CONTROL
INPUT
----ADDRESS
-INPUTS
----REFRESH
INPUT
-DATA INPUT
-DATA INPUT
-DATA INPUT
-DATA INPUT
-DATA INPUT
-DATA INPUT
-DATA INPUT
-DATA INPUT
-DATA OUTPUT
-DATA OUTPUT
-DATA OUTPUT
-DATA OUTPUT
-DATA OUTPUT
-DATA OUTPUT
-DATA OUTPUT
--DATA OUTPUT
Vss
RAS
CAS
W
Ao
At
A2
A3
A,
As
A6
A7
REF
Do
Dt
D2
D3
D4
Ds
D6
D7
Qo
Qt
Q2
Q3
Q,
Qs
Q6
Q7
(5V) Vee
III
G8
TIJ11 .A...
12
13
Q»....;
0
14
G15
16
lIJ19 :!:
'»"20 ...
21 0
G23
IlJ26 .A..
...21 g;
»28
0
29
Outline 30S5
BLOCK DIAGRAM
Do Qo
14 - 22
Dt
15 - 23
16 - 24
17 - 25
18 - 26
Ds Qs
19 - 27
D6 Q6
20 - 28
D7
21 - 29
I M5K4164AO
M5K4164AO
f
M5K4164AO
t
M5K4164AO
I
II IIM5K4164AoI M5K4164AO M5K4164AO M5K4164AO I
t tt
L@--
RAS
i'
CAS
2-206
I
4 ~----llJ
w Vee Vss
• MITSUBISHI
"ELECTRIC

1 page




MH6408AD-15 pdf
MITSUBISHI LSls
MH6408AD·15
S24 288-BIT(6S S36-WORD BY 8-BIT)DYNAMIC RAM
TIMING REQUIREMENTS (For Read, Write, Read-Modify-Write, Refresh, and Page-Mode Cycle)
a(Ta = -70°C. Vee = SV ± 10%. Vss = OV, unless otherwise noted, See notes 5, 6 and 7)
Symbol
Parameter
IORF
I WIRASH)
IWIRASL)
IWICASL)
I WICASH)
t h (RAS-CAS)
'h ICAS-RAS)
Id ICAS- RAS)
I d IRAS-CAS)
I su IRA-RAS)
I su ICA-CAS)
IhIRAS-RA)
I h ICAS-CA)
I h IRAS-CA)
I THL
I TLH
Refresh cycle time
RAS high pulse width
RAS low pulse width
CAS low pulse width
CAS high pulse Width
CAS hold time after RAS
RAS hold time after CAS
Delay time, CAS to RAS
Delay time, RAS to CAS
Row address setup time before RAS
Column address setup time before CAS
Row address hold time after RA'S
CohJrnn address hold time after CAS
Column address hold-time after RAS
TranSition time
INote 81
INote9)
INote 101
Alternative
Symbol
I REF
IRP
I RAS
I CAS
ICPN
ICSH
I RSH
ICRP
I ACO
IASR
IASC
I RAH
ICAH
IAR
IT
Min
100
150
75
35
150
75
-20
30
0
0
20
25
95
MH6408AD-15
Limits
Max
2
10000
00
,
100
3 35
Unit
ms
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note 5,
6
7.
8.
9.
10.
An initial pause of 500~s IS required after power-up followed by a.ny eight REF, RAS or RAS/CAS cycles before proper deVice operation is achieved.
The sWitching characteristiCS 3re defined as t THL =t TLH =5n5.
Reference levels of input Signals are VIH min. and VIL max Reference levels for transition time are aiso between V 1H and VIL.
Except for page· mode.
td~CAS.RAS) requirement IS only applicable for RAS/CAS cycles preceeded by a CAS only cycle (I.e., For systems where CAS has not been decoded with RAS)
Operation within the td (RAS-CAS) max limit Insures that ta (RAS) max can be met. td (RAS.CAS)maX IS specified reference point only. if
td (RAS-CAS) IS greater than the specified td (RAS-CAS) max limit. then access time is controlled exclusively by taICAS)-
+td (RAS'CAs)mln = th (AAS-RA)mm +-2t THL(t Tu-d t su (CA-CAS)mln.
SWITCHING CHARACTERISTICS (Ta=O-10'C, Vcc=5V ± 10%, VSs=OV, unless otherwise noted)
Read Cycle
Symbol
lOA
Isu IR-CAS)
Ih ICAS-R)
IhIRAS-RI
Idls ICAS)
la ICAS)
la IRAS)
Parameter
Read cycle time
Read setup time before CAS
Read hold time after CAS
Read hold time after RAS
Output disable time
CAS at.:cess time
RAS access time
INote 111
INote 111
INote 121
INote 131
INote 141
Alternative
Symbol
IRC
I RCS
I RCH
IRRH
IOFF
'CAC
IRAC
MH6408AD-15
Limits
Min Max
260
0
0
20
0 40
75
150
Unit
ns
ns
ns
ns
ns
ns
ns
Note 11
Note 12
Note 13.
Note 14
Either th (RAS-R) or th (CAS-R) must be satisfied for a read cycle
tdis (C AS) max defines the time at which the output achieves the open ClfCUlt condition and IS not reference to VOH or VOL
This is the value when td (RAS-CAS) ~ td (RAS-CAS) max. Test conditions; Load=2T TL. CL= 100pF
<ThiS IS the value when td (RAS-CAS) td (RAS-CAS) max. When td (RASwCAS) ~ td (RAS-CAS) max, ta (RAS) Will Increase by the amount that
td (RAS-CAS) exceeds the value shown. Test conditions; Load=2T TL. CL= 100pF
Write Cycle
Symbol
Parameter
loW
Isu IW-CAS)
Ih (CAS-W)
Ih IRAS-W)
Ih IW-RAS)
Ih IW-CAS)
IWIW)
Isu (D-CAS)
Ih ICAS-O)
Ih (RAS-O)
Write cycle time
Write setup time before CAS
Write hold time after CAS
Write hold time after RAS
FfA5"hold time after write
CAS hold time after write
Write pulse width
Data-in setup time before ~
Data-in hold time after CAS
Data-in hold time after ~
INote 171
Alternative
Symbol
IRC
IwCS
IWCH
IWCA
IAWL
ICWL
Iwp
los
IOH
IOHR
MH6408AD-15
Limits
Min Max
260
5
45
95
45
45
45
0
45
95
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
2-210
• MITSUBISHI
;"ELECTRIC

5 Page





MH6408AD-15 arduino
MITSUBISHI LSls
MH6408AD·15
524 288-BIT(65 536-WORD BY 8-BIT)DYNAMIC RAM
Hidden Self-Refresh Cycle (Note 221
READ CYCLE
VOH
Q
VOL
Note 22. If the pin 13 (REF) function is not used, pin 13 may be left open (not connect).
Hidden Refresh Cycle (Note 191
READ CYCLE
lOR
REFRESH CYCLE
lOR
twIRASL)
IwIRASL)
Id(CAS-RAS)
td I RAS-CAS)
Iw (RASH)
thlcAS-RAS)
twICASL)
REFRESH CYCLE
lOR
IW(RASL)
Iw (RASH)
IwICASH)
tsuIRA-RAS) thIRAS-RA)
Isu I RA- RAS)
V,H
W
V,L
VOH
Q
VOL
2-216
DATA VALID
'. MITSUBISHI
.... ELECTRIC
Idls ICAS)

11 Page







PáginasTotal 11 Páginas
PDF Descargar[ Datasheet MH6408AD-15.PDF ]




Hoja de datos destacado

Número de piezaDescripciónFabricantes
MH6408AD-15512K-Bit DRAMMitsubishi
Mitsubishi

Número de piezaDescripciónFabricantes
SLA6805M

High Voltage 3 phase Motor Driver IC.

Sanken
Sanken
SDC1742

12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters.

Analog Devices
Analog Devices


DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares,
permitiéndote verlos en linea o descargarlos en PDF.


DataSheet.es    |   2020   |  Privacy Policy  |  Contacto  |  Buscar