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PDF PIC24FV16KA302 Data sheet ( Hoja de datos )
| Número de pieza | PIC24FV16KA302 | |
| Descripción | 16-Bit Flash Microcontrollers | |
| Fabricantes | Microchip | |
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PIC24FV32KA304 FAMILY
20/28/44/48-Pin, General Purpose, 16-Bit Flash
Microcontrollers with XLP Technology
Power Management Modes:
• Run – CPU, Flash, SRAM and Peripherals On
• Doze – CPU Clock Runs Slower than Peripherals
• Idle – CPU Off, Flash, SRAM and Peripherals On
• Sleep – CPU, Flash and Peripherals Off and SRAM on
• Deep Sleep – CPU, Flash, SRAM and Most Peripherals
Off; Multiple Autonomous Wake-up Sources
• Low-Power Consumption:
- Run mode currents down to 8 μA, typical
- Idle mode currents down to 2.2 μA, typical
- Deep Sleep mode currents down to 20 nA, typical
- Real-Time Clock/Calendar currents down to
700 nA, 32 kHz, 1.8V
- Watchdog Timer 500 nA, 1.8V typical
High-Performance CPU:
• Modified Harvard Architecture
• Up to 16 MIPS Operation @ 32 MHz
• 8 MHz Internal Oscillator with 4x PLL Option and
Multiple Divide Options
• 17-Bit by 17-Bit Single-Cycle Hardware Multiplier
• 32-Bit by 16-Bit Hardware Divider, 16-Bit x 16-Bit
Working Register Array
• C Compiler Optimized Instruction Set Architecture
Peripheral Features:
• Hardware Real-Time Clock and Calendar (RTCC):
- Provides clock, calendar and alarm functions
- Can run in Deep Sleep mode
- Can use 50/60 Hz power line input as clock source
• Programmable 32-bit Cyclic Redundancy Check
(CRC)
• Multiple Serial Communication modules:
- Two 3-/4-wire SPI modules
- Two I2C™ modules with multi-master/slave support
- Two UART modules supporting RS-485, RS-232,
LIN/J2602, IrDA®
• Five 16-Bit Timers/Counters with Programmable
Prescaler:
- Can be paired as 32-bit timers/counters
• Three 16-Bit Capture Inputs with Dedicated Timers
• Three 16-Bit Compare/PWM Output with Dedicated
Timers
• Configurable Open-Drain Outputs on Digital I/O Pins
• Up to Three External Interrupt Sources
Analog Features:
• 12-Bit, Up to 16-Channel Analog-to-Digital Converter:
- 100 ksps conversion rate
- Conversion available during Sleep and Idle
- Auto-sampling timer-based option for Sleep and
Idle modes
- Wake on auto-compare option
• Dual Rail-to-Rail Analog Comparators with
Programmable Input/Output Configuration
• On-Chip Voltage Reference
• Internal Temperature Sensor
• Charge Time Measurement Unit (CTMU):
- Used for capacitance sensing, 16 channels
- Time measurement, down to 200 ps resolution
- Delay/pulse generation, down to 1 ns resolution
Special Microcontroller Features:
• Wide Operating Voltage Range:
- 1.8V to 3.6V (PIC24F devices)
- 2.0V to 5.5V (PIC24FV devices)
• Low Power Wake-up Sources and Supervisors:
- Ultra-Low Power Wake-up (ULPWU) for
Sleep/Deep Sleep
- Low-Power Watchdog Timer (DSWDT) for
Deep Sleep
- Extreme Low-Power Brown-out Reset (DSBOR)
for Deep Sleep, LPBOR for all other modes
• System Frequency Range Declaration bits:
- Declaring the frequency range optimizes the
current consumption.
• Standard Watchdog Timer (WDT) with On-Chip,
Low-Power RC Oscillator for Reliable Operation
• Programmable High/Low-Voltage Detect (HLVD)
• Standard Brown-out Reset (BOR) with 3 Programmable
Trip Points that can be Disabled in Sleep
• High-Current Sink/Source (18 mA/18 mA) on All I/O Pins
• Flash Program Memory:
- Erase/write cycles: 10,000 minimum
- 40 years’ data retention minimum
• Data EEPROM:
- Erase/write cycles: 100,000 minimum
- 40 years’ data retention minimum
• Fail-Safe Clock Monitor (FSCM)
• Programmable Reference Clock Output
• Self-Programmable under Software Control
• In-Circuit Serial Programming™ (ICSP™) and
In-Circuit Debug (ICD) via 2 Pins
2011-2012 Microchip Technology Inc.
DS39995C-page 1
1 page  
Pin Diagrams
PIC24FV32KA304 FAMILY
28-Pin QFN(1,2,3)
28 27 26 25 24 23 22
RB0 1
21 RB13
RB1 2
20 RB12
RB2 3 PIC24FVXXKA302 19 RB11
RB3 4
VSS 5
PIC24FXXKA302
18
17
RB10
RA6 or VCAP
RA2 6
16 RA7
RA3 7
15 RB9
8 9 10 11 12 13 14
Pin Features
Pin
PIC24FVXXKA302
PIC24FXXKA302
1 PGED1/AN2/ULPWU/CTCMP/C1IND/C2INB/C3IND/U2TX/CN4/RB0 PGED1/AN2/ULPWU/CTCMP/C1IND/C2INB/C3IND/U2TX/CN4/RB0
2 PGEC1/AN3/C1INC/C2INA/U2RX/CTED12/CN5/RB1
PGEC1/AN3/C1INC/C2INA/U2RX/CTED12/CN5/RB1
3 AN4/C1INB/C2IND/SDA2/T5CK/T4CK/U1RX/CTED13/CN6/RB2 AN4/C1INB/C2IND/SDA2/T5CK/T4CK/U1RX/CTED13/CN6/RB2
4 AN5/C1INA/C2INC/SCL2/CN7/RB3
AN5/C1INA/C2INC/SCL2/CN7/RB3
5 VSS
VSS
6 OSCI/AN13/CLKI/CN30/RA2
OSCI/AN13/CLKI/CN30/RA2
7 OSCO/AN14/CLKO/CN29/RA3
OSCO/AN14/CLKO/CN29/RA3
8 SOSCI/AN15/U2RTS/CN1/RB4
SOSCI/AN15/U2RTS/CN1/RB4
9 SOSCO/SCLKI/U2CTS/CN0/RA4
SOSCO/SCLKI/U2CTS/CN0/RA4
10 VDD
11 PGED3/ASDA1(2)/SCK2/CN27/RB5
12 PGEC3/ASCL1(2)/SDO2/CN24/RB6
VDD
PGED3/ASDA1(2)/SCK2/CN27/RB5
PGEC3/ASCL1(2)/SDO2/CN24/RB6
13 U1TX/C2OUT/OC1/INT0/CN23/RB7
14 SCL1/U1CTS/C3OUT/CTED10/CN22/RB8
15 SDA1/T1CK/U1RTS/IC2/CTED4/CN21/RB9
16 SDI2/IC1/CTED3/CN9/RA7
17 VCAP
18 PGED2/SDI1/OC3/CTED11/CN16/RB10
19 PGEC2/SCK1/OC2/CTED9/CN15/RB11
U1TX/INT0/CN23/RB7
SCL1/U1CTS/C3OUT/CTED10/CN22/RB8
SDA1/T1CK/U1RTS/IC2/CTED4/CN21/RB9
SDI2/IC1/CTED3/CN9/RA7
C2OUT/OC1/CTED1/INT2/CN8/RA6
PGED2/SDI1/OC3/CTED11/CN16/RB10
PGEC2/SCK1/OC2/CTED9/CN15/RB11
20 AN12/HLVDIN/SS2/IC3/CTED2/INT2/CN14/RB12
21 AN11/SDO1/OCFB/CTPLS/CN13/RB13
22 CVREF/AN10/C3INB/RTCC/C1OUT/OCFA/CTED5/INT1/CN12/
RB14
23 AN9/C3INA/T3CK/T2CK/REFO/SS1/CTED6/CN11/RB15
24 VSS/AVSS
25 VDD/AVDD
26 MCLR/VPP/RA5
27 VREF+/CVREF+/AN0/C3INC/CTED1/CN2/RA0
28 CVREF-/VREF-/AN1/CN3/RA1
AN12/HLVDIN/SS2/IC3/CTED2/CN14/RB12
AN11/SDO1/OCFB/CTPLS/CN13/RB13
CVREF/AN10/C3INB/RTCC/C1OUT/OCFA/CTED5/INT1/CN12/
RB14
AN9/C3INA/T3CK/T2CK/REFO/SS1/CTED6/CN11/RB15
VSS/AVSS
VDD/AVDD
MCLR/VPP/RA5
VREF+/CVREF+/AN0/C3INC/CN2/RA0
CVREF-/VREF-/AN1/CN3/RA1
Legend:
Note 1:
2:
3:
Pin numbers in bold indicate pin function differences between PIC24FV and PIC24F devices.
Exposed pad on underside of device is connected to VSS.
Alternative multiplexing for SDA1 (ASDA1) and SCL1 (ASCL1) when the I2CSEL Configuration bit is set.
PIC24F32KA304 device pins have a maximum voltage of 3.6V and are not 5V tolerant.
2011-2012 Microchip Technology Inc.
DS39995C-page 5
5 Page 
PIC24FV32KA304 FAMILY
1.0 DEVICE OVERVIEW
This document contains device-specific information for
the following devices:
• PIC24FV16KA301, PIC24F16KA301
• PIC24FV16KA302, PIC24F16KA302
• PIC24FV16KA304, PIC24F16KA304
• PIC24FV32KA301, PIC24F32KA301
• PIC24FV32KA302, PIC24F32KA302
• PIC24FV32KA304, PIC24F32KA304
The PIC24FV32KA304 family introduces a new line of
extreme low-power Microchip devices. This is a 16-bit
microcontroller family with a broad peripheral feature set
and enhanced computational performance. This family
also offers a new migration option for those
high-performance applications which may be
outgrowing their 8-bit platforms, but do not require the
numerical processing power of a digital signal processor.
1.1 Core Features
1.1.1 16-BIT ARCHITECTURE
Central to all PIC24F devices is the 16-bit modified
Harvard architecture, first introduced with Microchip’s
dsPIC® digital signal controllers. The PIC24F CPU core
offers a wide range of enhancements, such as:
• 16-bit data and 24-bit address paths with the
ability to move information between data and
memory spaces
• Linear addressing of up to 12 Mbytes (program
space) and 64 Kbytes (data)
• A 16-element working register array with built-in
software stack support
• A 17 x 17 hardware multiplier with support for
integer math
• Hardware support for 32-bit by 16-bit division
• An instruction set that supports multiple
addressing modes and is optimized for high-level
languages, such as C
• Operational performance up to 16 MIPS
1.1.2 POWER-SAVING TECHNOLOGY
All of the devices in the PIC24FV32KA304 family
incorporate a range of features that can significantly
reduce power consumption during operation. Key
features include:
• On-the-Fly Clock Switching: The device clock
can be changed under software control to the
Timer1 source or the internal, low-power RC
oscillator during operation, allowing users to
incorporate power-saving ideas into their software
designs.
• Doze Mode Operation: When timing-sensitive
applications, such as serial communications,
require the uninterrupted operation of peripherals,
the CPU clock speed can be selectively reduced,
allowing incremental power savings without
missing a beat.
• Instruction-Based Power-Saving Modes: There
are three instruction-based power-saving modes:
- Idle Mode: The core is shut down while leaving
the peripherals active.
- Sleep Mode: The core and peripherals that
require the system clock are shut down, leaving
the peripherals that use their own clock, or the
clock from other devices, active.
- Deep Sleep Mode: The core, peripherals
(except RTCC and DSWDT), Flash and SRAM
are shut down.
1.1.3
OSCILLATOR OPTIONS AND
FEATURES
The PIC24FV32KA304 family offers five different
oscillator options, allowing users a range of choices in
developing application hardware. These include:
• Two Crystal modes using crystals or ceramic
resonators.
• Two External Clock modes offering the option of a
divide-by-2 clock output.
• Two Fast Internal oscillators (FRCs): One with a
nominal 8 MHz output and the other with a
nominal 500 kHz output. These outputs can also
be divided under software control to provide clock
speed as low as 31 kHz or 2 kHz.
• A Phase Locked Loop (PLL) frequency multiplier,
available to the external Oscillator modes and the
8 MHz FRC oscillator, which allows clock speeds
of up to 32 MHz.
• A separate internal RC oscillator (LPRC) with a
fixed 31 kHz output, which provides a low-power
option for timing-insensitive applications.
2011-2012 Microchip Technology Inc.
DS39995C-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PIC24FV16KA302.PDF ] | |
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