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PDF ATmega88 Data sheet ( Hoja de datos )
| Número de pieza | ATmega88 | |
| Descripción | Automotive 8-bit AVR Microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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ATmega48/88/168 Automotive
8-bit AVR Microcontroller with 8Kbytes In-system
Programmable Flash
DATASHEET
Features
● High performance, low power AVR® 8-bit microcontroller
● Advanced RISC architecture
● 131 powerful instructions – most single clock cycle execution
● 32 8 general purpose working registers
● Fully static operation
● Up to 16MIPS throughput at 16MHz
● On-chip 2-cycle multiplier
● Non-volatile program and data memories
● 4/8/16Kbytes of in-system self-programmable flash (ATmega48/88/168)
● Endurance: 75,000 write/erase cycles
● Optional boot code section with independent lock bits
● In-system programming by on-chip boot program
● True read-while-write operation
● 256/512/512 Bytes EEPROM (ATmega48/88/168)
● Endurance: 100,000 write/erase cycles
● 512/1K/1Kbyte internal SRAM (ATmega48/88/168)
● Programming lock for software security
● Peripheral features
● Two 8-bit Timer/Counters with separate prescaler and compare mode
● One 16-bit Timer/Counter with separate prescaler, compare mode, and capture
mode
● Real time counter with separate oscillator
● Six PWM channels
● 8-channel 10-bit ADC
● Programmable serial USART
● Master/slave SPI serial interface
● Byte-oriented 2-wire serial interface
● Programmable watchdog timer with separate on-chip oscillator
● On-chip analog comparator
● Interrupt and wake-up on pin change
● Special microcontroller features
● Power-on reset and programmable brown-out detection
● Internal calibrated oscillator
● External and internal interrupt sources
● Five sleep modes: Idle, ADC noise reduction, power-save, power-down, and
standby
7530K-AVR-07/14
1 page  
The AVR® core combines a rich instruction set with 32 general purpose working registers. All the 32 registers are directly
connected to the arithmetic logic unit (ALU), allowing two independent registers to be accessed in one single instruction
executed in one clock cycle. The resulting architecture is more code efficient while achieving throughputs up to ten times
faster than conventional CISC microcontrollers.
The Atmel® ATmega48/88/168 provides the following features: 4K/8K/16Kbytes of in-system programmable flash with
read-while-write capabilities, 256/512/512 bytes EEPROM, 512/1K/1Kbytes SRAM, 23 general purpose I/O lines, 32 general
purpose working registers, three flexible Timer/Counters with compare modes, internal and external interrupts, a serial
programmable USART, a byte-oriented 2-wire serial interface, an SPI serial port, a 6-channel 10-bit ADC (8 channels in
TQFP and QFN packages), a programmable watchdog timer with internal oscillator, and five software selectable power
saving modes. The idle mode stops the CPU while allowing the SRAM, Timer/Counters, USART, 2-wire serial interface, SPI
port, and interrupt system to continue functioning. The power-down mode saves the register contents but freezes the
oscillator, disabling all other chip functions until the next interrupt or hardware reset. In power-save mode, the asynchronous
timer continues to run, allowing the user to maintain a timer base while the rest of the device is sleeping. The ADC noise
reduction mode stops the CPU and all I/O modules except asynchronous timer and ADC, to minimize switching noise during
ADC conversions. In Standby mode, the crystal/resonator Oscillator is running while the rest of the device is sleeping. This
allows very fast start-up combined with low power consumption.
The device is manufactured using Atmel’s high density non-volatile memory technology. The on-chip ISP flash allows the
program memory to be reprogrammed in-system through an SPI serial interface, by a conventional non-volatile memory
programmer, or by an on-chip boot program running on the AVR core. The boot program can use any interface to download
the application program in the application flash memory. Software in the boot flash section will continue to run while the
application flash section is updated, providing true read-while-write operation. By combining an 8-bit RISC CPU with
in-system self-programmable flash on a monolithic chip, the Atmel ATmega48/88/168 is a powerful microcontroller that
provides a highly flexible and cost effective solution to many embedded control applications.
The Atmel ATmega48/88/168 AVR is supported with a full suite of program and system development tools including: C
compilers, macro assemblers, program debugger/simulators, in-circuit emulators, and evaluation kits.
2.2 Automotive Quality Grade
The ATmega48-15AZ, ATmega88-15AZ and ATmega168-15AZ have been developed and manufactured according to the
most stringent requirements of the international standard ISO-TS-16949 grade 1. This data sheet contains limit values
extracted from the results of extensive characterization (temperature and voltage). The quality and reliability of the
ATmega48-15AZ, ATmega88-15AZ and ATmega168-15AZ have been verified during regular product qualification as per
AEC-Q100.
As indicated in the ordering information paragraph (see Section 31. “Ordering Information” on page 296), the products are
available in three different temperature grades, but with equivalent quality and reliability objectives. Different temperature
identifiers have been defined as listed in Table 2-1.
Table 2-1. Temperature Grade Identification for Automotive Products
Temperature
–40; +85
–40; +105
–40; +125
Temperature
Identifier
T
T1
Z
Comments
Similar to industrial temperature grade but with automotive quality
Reduced automotive temperature range
Full automotive temperature range
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
5
5 Page 
4.5 General Purpose Register File
The register file is optimized for the AVR® enhanced RISC instruction set. In order to achieve the required performance and
flexibility, the following input/output schemes are supported by the register file:
● One 8-bit output operand and one 8-bit result input
● Two 8-bit output operands and one 8-bit result input
● Two 8-bit output operands and one 16-bit result input
● One 16-bit output operand and one 16-bit result input
Figure 4-2 shows the structure of the 32 general purpose working registers in the CPU.
Figure 4-2. AVR CPU General Purpose Working Registers
General
Purpose
Working
Registers
70
R0
R1
R2
…
R13
R14
R15
R16
R17
…
R26
R27
R28
R29
R30
R31
Addr.
0x00
0x01
0x02
0x0D
0x0E
0x0F
0x10
0x11
0x1A
0x1B
0x1C
0x1D
0x1E
0x1F
X-register Low Byte
X-register High Byte
Y-register Low Byte
Y-register High Byte
Z-register Low Byte
Z-register High Byte
Most of the instructions operating on the register file have direct access to all registers, and most of them are single cycle
instructions.
As shown in Figure 4-2, each register is also assigned a data memory address, mapping them directly into the first
32 locations of the user data space. Although not being physically implemented as SRAM locations, this memory
organization provides great flexibility in access of the registers, as the X-, Y- and Z-pointer registers can be set to index any
register in the file.
ATmega48/88/168 Automotive [DATASHEET]
7530K–AVR–07/14
11
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