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PDF SP312A Data sheet ( Hoja de datos )
| Número de pieza | SP312A | |
| Descripción | Enhanced RS-232 Line Drivers/Receivers | |
| Fabricantes | Exar | |
| Logotipo |  |
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SP233A,SP310A and SP312A
Enhanced RS-232 Line Drivers/Receivers
FEATURES
• Operates from a Single +5V Power Supply
• Meets all RS-232F and ITU V.28 Specifications
• Operates with 0.1μF Ceramic Capacitors
• No External Capacitors required (SP233A)
• Low Power Shutdown (SP310A, SP312A)
• High Data Rate - 120kbps under load
• Low power CMOS Operation
• +/-2kV Human Body Model ESD Protection
• Lead Free packaging available
DESCRIPTION
The SP233A / SP310A / SP312A devices are a family of line driver and receiver pairs that meets
the specifications of RS-232 and V.28 serial protocols. The devices are pin-to-pin compatible with
popular industry standard pinouts. The SP233A / SP310A / SP312A offer 120kbps data rate under
load, small ceramic type 0.1μF charge pump capacitors and overall ruggedness for comercial appli-
cations. Features include Exar's BiCMOS design allowing for low power operation without sacrificing
performance. These devices are available in plastic DIP and SOIC Wide packages operating over
the commercial and industrial temperature ranges.
SELECTION TABLE
Model
Number of RS-232 No. of RX
Drivers
Receivers
active in
Shutdown
SP233A 2
2
N/A
SP310A 2
2
0
SP312A 2
2
2
No. of External
0.1μF Capacitors Shutdown
0 No
4 Yes
4 Yes
WakeUp TTL Tri-State
No No
No Yes
Yes Yes
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7000 • Fax (510)668-7017 • www.exar.com SP233A,310A,312A 101_060311
1 page  
Phase 4
Vdd transfer: The fourth phase connects the
negative terminal of C2 to ground and the posi-
tive terminal of C2 to the Vdd storage capacitor.
This transfers the doubled (V+) voltage onto C3.
Meanwhile, capacitor C1 is charged from Vcc to
prepare it for its next phase.
The clock rate for the charge pump typically op-
erates at greater than 15kHz allowing the pump
to run efficiently with small 0.1uF capacitors. Ef-
ficient operation depends on rapid charging and
discharging of C1 and C2, therefore capacitors
should be mounted as close as possible to the
IC and have low ESR (equivalent series resis-
tance). Inexpensive surface mount, ceramic ca-
pacitors are ideal for using on charge pump. If
polarized capacitors are used the positive and
negative terminals should be connected as
shown in the typical operating circuit. A diagram
of the individual phases are shown in Figure 1.
Shutdown (SD) and Enable (EN) features for
the SP310A and SP312A
Both the SP310A and SP312A have a shutdown
/ standby mode to conserve power in battery-
powered applications. To activate the shutdown
mode, which stops the operation of the charge
pump, a logic "0" is applied to the appropriate
control line. For the SP310A, this control line is
the ON/OFF (pin 18) input. Activating the shut-
down mode puts the SP310A transmitter and re-
ceiver ouptuts into a high impedance condition.
For the SP312A, this control line is the SHUT-
DOWN (pin18) input; this also puts the transmit-
ter outputs in a tri-state mode. The receiver out-
puts can be tri-stated seperately during normal
operation or shutdown by applying a logic "1" on
the EN line (pin 1).
Wake-Up Feature for the SP312A
The SP312A has a wake-up feature that keeps
the receivers active when the device is placed
into shutdown. Table 1 defines the truth table for
the Wake-Up function. When only the receivers
are activated, the SP312A typically draws less
than 5uA supply current. In the case of when
a modem is interfaced to a computer in power
down mode, the Ring Indicator (RI) signal from
the modem would be used to "wake-up" the
computer, allowing it to accept data transmis-
sion.
DESCRIPTION
After the ring indicator has propagated
through the SP312A receiver, it can be used
to trigger the power management circuitry of
the computer to power up the microproces-
sor, and bring the SD pin of the SP312A to a
logic high, taking it out of the shutdown mode.
The receiver propagation delay is typically
1us. The enable time for V+ and V- is typi-
cally 2ms. After V+ and V- have settled to their
final values, a signal can be sent back to the
modem on the data terminal ready (DTR) pin
signifying that the computer is ready to accept
the transmit data.
Power Receiver
SD EN Up/Down outputs
0 0 Down Enabled
0 1 Down Tri-state
1 0 Up Enabled
11
Up Tri-state
Table 1. Wake-up Function truth table
Pin Strapping for the SP233ACT/ACP
The SP233A packaged in a 20 pin SOICW
package (SP233ACT) has a slightly different
pinout than the SP233A in PDIP packaging
(SP233ACP). To operate properly, the fol-
lowing pairs of pins must be externally wired
together as noted in table 2:
Pins Wired
Together
Two V- pins
Two C2+ pins
Two C- pins
SOICW PDIP
10 & 17 12 & 17
12 & 15 11 & 15
11 & 16 10 & 16
No Connections for
Pins 8, 13 and 14
Connect Pins 6 and 9
to GND
Table 2. Pin Strapping table for SP233A
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7000 • Fax (510)668-7017 • www.exar.com SP233A,310A,312A 101_060311
5 Page 
Exar Corporation 48720 Kato Road, Fremont CA, 94538 • (510)668-7000 • Fax (510)668-7017 • www.exar.com SP233A,310A,312A 101_060311
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet SP312A.PDF ] | |
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