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PDF THC63LVD104C Data sheet ( Hoja de datos )
| Número de pieza | THC63LVD104C | |
| Descripción | 112MHz 30Bits COLOR LVDS Receiver | |
| Fabricantes | THine Electronics | |
| Logotipo |  |
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THC63LVD104C_Rev.2.1_E
THC63LVD104C
112MHz 30Bits COLOR LVDS Receiver
General Description
The THC63LVD104C receiver is designed to support
pixel data transmission between Host and Flat Panel
Display from NTSC up to SXGA resolutions. The
THC63LVD104C converts the LVDS data streams back
into 35bits of CMOS/TTL data with the choice of the
rising edge or falling edge clock for the convenience
with a variety of LCD panel controllers.At a transmit
clock frequency of 112MHz, 30bits of RGB data and
5bits of timing and control data (HSYNC,
VSYNC,DE,CNTL1,CNTL2) are transmitted at an
effective rate of 784Mbps per LVDS channel.Using a
112MHz clock, the data throughput is 490Mbytes per
second.
Features
• Wide dot clock range: 8-112MHz suited for NTSC,
VGA, SVGA, XGA, and SXGA
• PLL requires no external components
• 50% output clock duty cycle
• TTL clock edge programmable
• Power down mode
• Low power single 3.3V CMOS design
• 64pin TQFP
• Backward compatible with THC63LVDF64x
(18bits) / F84x(24bits)
• Pin compatible with THC63LVD104A
• Fail-safe for Open LVDS Input
Block Diagram
LVDS INPUT
RA+/-
RB+/-
RC+/-
RD+/-
RE+/-
RCLK+/-
(8 to 112MHz)
CMOS/TTL INPUT
TEST
PD
OE
R/F
Copyright©2010 THine Electronics, Inc.
CMOS/TTL OUTPUT
7 RA6-RA0
7 RB6-RB0
7 RC6-RC0
7 RD6-RD0
7 RE6-RE0
PLL CLKOUT
1/13 THine Electronics, Inc.
1 page  
THC63LVD104C_Rev.2.1_E
Supply Current
THine
VCC =LVCC=PVCC= 3.0V ~ 3.6V, Ta = -20°C ~ +85°C
Symbol
Parameter
Conditions
Typ. Max. Units
IRCCW
Receiver Supply
Current
(LVDS Full Toggle)
fCLKOUT = 75MHz
fCLKOUT = 90MHz
fCLKOUT = 112MHz
CL=8pF,Vcc=3.6V,
Ta= -20°C ~ 85°C
CL=8pF,Vcc=3.6V,
Ta= -20°C ~70 °C *
205 mA
236 mA
280 mA
IRCCS
Receiver Power Down
Supply Current
PD = L
25 μA
*The trade-off between the output load and the ambient temperature exists so that the junction temperature does not
exceed 125 °C .
LVDS Full Toggle Pattern
CLKOUT
Rx0
Rx1
Rx2
Rx3
Rx4
Rx5
Rx6
x=A,B,C,D,E
Copyright©2010 THine Electronics, Inc.
5/13
THine Electronics, Inc.
5 Page 
THC63LVD104C_Rev.2.1_E
Note
1)Power On Sequence
Power on LVDS-Tx after THC63LVD104C.
2)Cable Connection and Disconnection
Don't connect and disconnect the LVDS cable, when the power is supplied to the system.
THine
3)GND Connection
Connect the each GND of the PCB which LVDS-Tx and THC63LVD104C on it. It is better for EMI reduction to place
GND cable as close to LVDS cable as possible.
4)Multi Drop Connection
Multi drop connection is not recommended.
LVDS-Tx
TCLK+
TCLK-
THC63LVD104C
THC63LVD104C
5)Asynchronous use
Asynchronous use such as following systems are not recommended.
CLKOUT
DATA
IC
CLKOUT
DATA
LVDS-Tx
LVDS-Tx
TCLK+
TCLK-
TCLK+
TCLK-
CLKOUT
THC63LVD104C DATA
IC
THC63LVD104C DATA
TCLK+
TCLK-
CLKOUT
THC63LVD104C DATA
IC IC
TCLK+
TCLK-
THC63LVD104C DATA
Copyright©2010 THine Electronics, Inc.
11/13
THine Electronics, Inc.
11 Page | ||
| Páginas | Total 13 Páginas | |
| PDF Descargar | [ Datasheet THC63LVD104C.PDF ] | |
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