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What is CY7C0851AV?

This electronic component, produced by the manufacturer "Cypress Semiconductor", performs the same function as "3.3 V 32 K / 64 K / 128 K / 256 K x 36 Synchronous Dual-Port RAM".


CY7C0851AV Datasheet PDF - Cypress Semiconductor

Part Number CY7C0851AV
Description 3.3 V 32 K / 64 K / 128 K / 256 K x 36 Synchronous Dual-Port RAM
Manufacturers Cypress Semiconductor 
Logo Cypress Semiconductor Logo 


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CY7C0851V/CY7C0851AV
CY7C0852V/CY7C0852AV
CY7C0853V/CY7C0853AV
FLEx36™ 3.3 V 32 K / 64 K / 128 K / 256 K × 36
Synchronous Dual-Port RAM
FLEx36™ 3.3 V 32 K / 64 K / 128 K / 256 K × 36 Synchronous Dual-Port RAM
Features
True dual-ported memory cells that allow simultaneous access
of the same memory location
Synchronous pipelined operation
Organization of 2-Mbit, 4-Mbit, and 9-Mbit devices
Pipelined output mode allows fast operation
0.18-micron Complimentary metal oxide semiconductor
(CMOS) for optimum speed and power
High-speed clock to data access
3.3 V low power
Active as low as 225 mA (typ)
Standby as low as 55 mA (typ)
Mailbox function for message passing
Global master reset
Separate byte enables on both ports
Commercial and industrial temperature ranges
IEEE 1149.1-compatible Joint test action group (JTAG)
boundary scan
172-Ball fine-pitch ball grid array (FBGA) (1 mm pitch)
(15 mm × 15 mm)
176-Pin thin quad plastic flatpack (TQFP)
(24 mm × 24 mm × 1.4 mm)
Counter wrap around control
Internal mask register controls counter wrap-around
Counter-interrupt flags to indicate wrap-around
Memory block retransmit operation
Counter readback on address lines
Mask register readback on address lines
Dual chip enables on both ports for easy depth expansion
Functional Description
The FLEx36™ family includes 2M, 4M, and 9M pipelined,
synchronous, true dual-port static RAMs that are high-speed,
low-power 3.3 V CMOS. Two ports are provided, permitting
independent, simultaneous access to any location in memory.
The result of writing to the same location by more than one port
at the same time is undefined. Registers on control, address, and
data lines allow for minimal setup and hold time.
During a Read operation, data is registered for decreased cycle
time. Each port contains a burst counter on the input address
register. After externally loading the counter with the initial
address, the counter increments the address internally (more
details to follow). The internal Write pulse width is independent
of the duration of the R/W input signal. The internal Write pulse
is self-timed to allow the shortest possible cycle times.
A HIGH on CE0 or LOW on CE1 for one clock cycle powers down
the internal circuitry to reduce the static power consumption. One
cycle with chip enables asserted is required to reactivate the
outputs.
Additional features include: readback of burst-counter internal
address value on address lines, counter-mask registers to
control the counter wrap-around, counter interrupt (CNTINT)
flags, readback of mask register value on address lines,
retransmit functionality, interrupt flags for message passing,
JTAG for boundary scan, and asynchronous Master Reset
(MRST).
The CY7C0853V/CY7C0853AV device in this family has limited
features. Please see Address Counter and Mask Register
Operations on page 9 for details.
For a complete list of related documentation, click here.
Product Selection Guide
Density
2-Mbit (64 K × 36)
4-Mbit (128 K × 36)
Part number
CY7C0851V/CY7C0851AV CY7C0852V/CY7C0852AV
Max. speed (MHz)
167 167
Max. access time - clock to data (ns)
4.0
4.0
Typical operating current (mA)
225
225
Package
176-pin TQFP, 172-ball FBGA 176-pin TQFP, 172-ball FBGA
9-Mbit (256 K × 36)
CY7C0853V/CY7C0853AV
133
4.7
270
172-ball FBGA
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 38-06070 Rev. *O
• San Jose, CA 95134-1709 • 408-943-2600
Revised November 18, 2015

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CY7C0851AV equivalent
CY7C0851V/CY7C0851AV
CY7C0852V/CY7C0852AV
CY7C0853V/CY7C0853AV
Pin Configurations (continued)
Figure 2. 172-ball BGA pinout (Top View)
1 2 3 4 5 6 7 8 9 10 11 12 13 14
A DQ32L DQ30L NC
VSS DQ13L VDD DQ11L DQ11R VDD DQ13R VSS
NC DQ30R DQ32R
B A0L DQ33L DQ29L DQ17L DQ14L DQ12L DQ9L DQ9R DQ12R DQ14R DQ17R DQ29R DQ33R A0R
C
A17L
A1L DQ31L DQ27L INTL DQ15L DQ10L DQ10R DQ15R INTR DQ27R DQ31R A1R
A17R
D
A2L
A3L DQ35L DQ34L DQ28L DQ16L VSS
VSS DQ16R DQ28R DQ34R DQ35R A3R
A2R
E A4L A5L VDD B0L VDD VSS
VDD
VDD
B0R
VDD
A5R
A4R
F VDD A6L A7L B1L VDD
VSS
B1R
A7R
A6R
VDD
G OEL B2L B3L VSS
H VSS R/WL A8L CLKL
CY7C0853V/CY7C0853AV
VSS
B3R
B2R
OER
CLKR A8R R/WR VSS
J
A9L
A10L
VSS
VSS
VSS
VDD
VSS MRST A10R A9R
K
A11L A12L A15L
VDD
VDD
VDD
VSS
VDD
VDD A15R A12R A11R
L
VDD
A13L
VSS DQ26L DQ25L DQ19L VSS
VSS DQ19R DQ25R DQ26R VSS A13R VDD
M
A16L A14L DQ22L DQ18L TDI
DQ7L DQ2L DQ2R DQ7R TCK DQ18R DQ22R A14R A16R
N DQ24L DQ20L DQ8L DQ6L DQ5L DQ3L DQ0L DQ0R DQ3R DQ5R DQ6R DQ8R DQ20R DQ24R
P DQ23L DQ21L TDO VSS DQ4L VDD DQ1L DQ1R VDD DQ4R VSS TMS DQ21R DQ23R
Document Number: 38-06070 Rev. *O
Page 5 of 39


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Part Details

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Featured Datasheets

Part NumberDescriptionMFRS
CY7C0851AVThe function is 3.3 V 32 K / 64 K / 128 K / 256 K x 36 Synchronous Dual-Port RAM. Cypress SemiconductorCypress Semiconductor

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