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PDF S34MS08G2 Data sheet ( Hoja de datos )

Número de pieza S34MS08G2
Descripción NAND Flash Memory
Fabricantes Cypress Semiconductor 
Logotipo Cypress Semiconductor Logotipo



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No Preview Available ! S34MS08G2 Hoja de datos, Descripción, Manual

S34MS08G2
8 Gb, 4-Bit ECC, x8 I/O and 1.8 V VCC
NAND Flash Memory for Embedded
Distinctive Characteristics
Density
– 8 Gb (4 Gb x 2)
Architecture (For each 4 Gb device)
– Input / Output Bus Width: 8-bits
– Page Size: (2048 + 128) bytes; 128-byte spare area
– Block Size: 64 Pages or (128k + 8k) bytes
– Plane Size
– 2048 Blocks per Plane or (256M + 16M) bytes
– Device Size
– 2 Planes per Device or 512 Mbyte
NAND Flash Interface
– Open NAND Flash Interface (ONFI) 1.0 compliant
– Address, Data and Commands multiplexed
Supply Voltage
– 1.8V device: VCC = 1.7V ~ 1.95V
Security
– One Time Programmable (OTP) area
– Serial number (unique ID)
– Hardware program/erase disabled during power transition
Additional Features
– Supports Multiplane Program and Erase commands
– Supports Copy Back Program
– Supports Multiplane Copy Back Program
– Supports Read Cache
Electronic Signature
– Manufacturer ID: 01h
Operating Temperature
– Industrial: –40 °C to 85 °C
– Industrial Plus: –40 °C to 105 °C
Performance
Page Read / Program
– Random access: 30 µs (Max)
– Sequential access: 45 ns (Min)
– Program time / Multiplane Program time: 300 µs (Typ)
Block Erase / Multiplane Erase
– Block Erase time: 3.5 ms (Typ)
Reliability
– 100,000 Program / Erase cycles (Typ)
(with 4-bit ECC per 528 bytes)
– 10 Year Data retention (Typ)
– Blocks zero and one are valid and will be valid for at least
1000
program-erase cycles with ECC
Package Options
– Lead Free and Low Halogen
– 63-Ball BGA 9 x 11 x 1 mm
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 002-00515 Rev. *E
• San Jose, CA 95134-1709 • 408-943-2600
Revised October 27, 2016

1 page




S34MS08G2 pdf
S34MS08G2
4. Block Diagrams
Figure 4.1 Functional Block Diagram — 8 Gb
Address
Register/
Counter
Program Erase
Controller
HV Generation
ALE
CLE
WE#
CE#
WP#
RE#
Command
Interface
Logic
Command
Register
Data
Register
8192 Mbit + 512 Mbit (8 Gb Device)
NAND Flash
Memory Array
X
D
E
C
O
D
E
R
Page Buffer
Y Decoder
I/O Buffer
I/O0~I/O7
Document Number: 002-00515 Rev. *E
Page 5 of 17

5 Page





S34MS08G2 arduino
S34MS08G2
Table 7.3 Parameter Page Description (Continued)
Byte
137-138
139-140
141-163
164-165
166-253
254-255
256-511
512-767
768+
O/M Description
M tR Maximum page read time (µs)
M tCCS Minimum Change Column setup time (ns)
Reserved (0)
Vendor Block
M Vendor specific Revision number
Vendor specific
M Integrity CRC
Redundant Parameter Pages
M Value of bytes 0-255
M Value of bytes 0-255
O Additional redundant parameter pages
Note:
1. “O” Stands for Optional, “M” for Mandatory.
1Eh, 00h
C8h, 00h
00h
Values
00h
00h
18h, C2h
Repeat Value of bytes 0-255
Repeat Value of bytes 0-255
FFh
Document Number: 002-00515 Rev. *E
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