S34ML16G2 Datasheet PDF - Cypress Semiconductor
Part Number | S34ML16G2 | |
Description | NAND Flash | |
Manufacturers | Cypress Semiconductor | |
Logo | ||
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16 Gb, 4-Bit ECC, x8 I/O, 3 V VCC
NAND Flash for Embedded
General Description
Cypress S34ML16G2 16-Gb NAND is offered in 3.3 VCC with x8 I/O interface. This document contains information for the
S34ML16G2 device, which is a quad-die stack of four S34ML04G2 die. For detailed specifications, please refer to the discrete die
data sheet: S34ML01G2_04G2.
Distinctive Characteristics
Density
– 16 Gb (4 Gb 4)
Architecture (For each 4 Gb device)
– Input / Output Bus Width: 8-bits
– Page Size: (2048 + 128) bytes; 128-byte spare area
– Block Size: 64 Pages or (128k + 8k) bytes
– Plane Size
– 2048 Blocks per Plane or (256M + 16M) bytes
– Device Size
– 2 Planes per Device or 512 Mbyte
NAND Flash Interface
– Open NAND Flash Interface (ONFI) 1.0 compliant
– Address, Data and Commands multiplexed
Supply Voltage
– 3.3 V device: Vcc = 2.7 V ~ 3.6 V
Security
– One Time Programmable (OTP) area
– Serial number (unique ID)
– Hardware program/erase disabled during power transition
Additional Features
– Supports Multiplane Program and Erase commands
– Supports Copy Back Program
– Supports Multiplane Copy Back Program
– Supports Read Cache
Electronic Signature
– Manufacturer ID: 01h
Operating Temperature
– Industrial: 40 °C to 85 °C
Performance
Page Read / Program
– Random access: 30 µs (Max)
– Sequential access: 25 ns (Min)
– Program time / Multiplane Program time: 300 µs (Typ)
Block Erase / Multiplane Erase
– Block Erase time: 3.5 ms (Typ)
Reliability
– 100,000 Program / Erase cycles (Typ)
(with 4-bit ECC per 528 bytes)
– 10 Year Data retention (Typ)
– Blocks zero and one are valid and will be valid for at least
1000
program-erase cycles with ECC
Package Options
– Lead Free and Low Halogen
– 48-Pin TSOP 12 20 1.2 mm
– 63-Ball BGA 9 11 1.2 mm
Cypress Semiconductor Corporation • 198 Champion Court
Document Number: 001-98528 Rev. *D
• San Jose, CA 95134-1709 • 408-943-2600
Revised April 25, 2016
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S34ML16G2
3. Block Diagrams
Figure 3.1 Functional Block Diagram — 16 Gb
Address
Register/
Counter
Program Erase
Controller
HV Generation
ALE
CLE
WE#
CE#
WP#
RE#
Command
Interface
Logic
16 Gb Device (4 Gb x 4)
NAND Flash
Memory Array
Page Buffer
X
D
E
C
O
D
E
R
Command
Register
Data
Register
Y Decoder
I/O Buffer
I/O0~I/O7
Figure 3.2 Block Diagram — 16 Gb (4 Gb x 4) 48-Pin TSOP with 2 CE# (Two Chip Enable Signals)
IO0~IO7
CE2# CE#
WE# 4 Gb x8
RE# NAND Flash
Memory #4
ALE
CLE
RB#
VSS
VCC
RB2#
WP#
CE#
WE#
4 Gb x8
RE# NAND Flash
ALE Memory #3
CLE
WP#
IO0~IO7
RB#
VSS
VCC
CE1#
WE#
RE#
ALE
CLE
WP#
Document Number: 001-98528 Rev. *D
CE#
WE# 4 Gb x8
NAND Flash
RE#
Memory #2
ALE
CLE
WP#
IO0~IO7
RB#
VSS
VCC
CE#
WE#
4 Gb x8
RE# NAND Flash
ALE Memory #1
CLE
WP#
IO0~IO7
RB#
VSS
VCC
IO0~IO7
RB1#
VSS
VCC
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Information | Total 18 Pages | |
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