ZSSC3026 Datasheet PDF - Zentrum Mikroelektronik Dresden
Part Number | ZSSC3026 | |
Description | High Resolution 16-Bit Sensor Signal Conditioner | |
Manufacturers | Zentrum Mikroelektronik Dresden | |
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There is a preview and ZSSC3026 download ( pdf file ) link at the bottom of this page. Total 30 Pages |
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Rev. 1.02 / May 2012
ZSSC3026
Low Power, High Resolution 16-Bit Sensor Signal Conditioner
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ZSSC3026
Low Power 16 Bit Sensor Signal Conditioner IC
3.8.2. Temperature Signal Compensation ............................................................................................... 40
4 Die Dimensions and Pin Assignments ........................................................................................................ 41
4.1. Package (PQFN24) Properties............................................................................................................. 43
5 Quality and Reliability..................................................................................................................................44
6 Related Documents..................................................................................................................................... 45
7 Glossary ...................................................................................................................................................... 45
8 Document Revision History......................................................................................................................... 46
Table of Figures
Figure 2.1 ZSSC3026 Functional Block Diagram........................................................................................... 11
Figure 2.2 ADC Offset..................................................................................................................................... 16
Figure 3.1 Operational Flow Chart: Power up. ............................................................................................... 20
Figure 3.2 Operational Flow Chart: Command Mode and Normal Mode. ...................................................... 21
Figure 3.3 SPI configuration CPHA=0. ........................................................................................................... 25
Figure 3.4 SPI Configuration CPHA=1. .......................................................................................................... 25
Figure 3.5 SPI Command Request................................................................................................................. 26
Figure 3.6 SPI Read Status. ........................................................................................................................... 26
Figure 3.7 SPI Read Data............................................................................................................................... 26
Figure 3.8 I2C Command Request................................................................................................................. 27
Figure 3.9 I2C Read Status. .......................................................................................................................... 27
Figure 3.10 I2C Read Data................................................................................................................................ 28
Figure 3.11 Memory Program Operation. ......................................................................................................... 29
Figure 4.1 ZSSC3026 Pad Placement............................................................................................................ 41
Figure 4.2 General PQFN24 Package Dimensions. ....................................................................................... 43
List of Tables
Table 1.1
Table 1.2
Table 1.3
Table 1.4
Table 2.1
Table 2.2
Table 2.3
Table 2.4
Table 2.5
Table 2.6
Table 2.7
Table 3.1
Maximum Ratings. ........................................................................................................................... 7
Operating Conditions. ...................................................................................................................... 7
Constraints for VDD Power-on Reset.............................................................................................. 7
Electrical Parameters. ..................................................................................................................... 8
Amplifier Gain: Stage 1.................................................................................................................. 12
Amplifier Gain: Stage 2.................................................................................................................. 12
Gain Polarity. ................................................................................................................................. 13
MSB/LSB Settings. ........................................................................................................................ 14
ADC Conversion Times for a single A2D conversion.................................................................... 14
Conversion Times vs. Noise Performance for 16bit fully Signal Conditioned Results
(AZBM, BM, AZTM, TM and digital SSC correction). ................................................................... 15
ADC Offset Settings. ..................................................................................................................... 16
SPI/I2C Commands....................................................................................................................... 22
Data Sheet
May 15, 2012
© 2012 Zentrum Mikroelektronik Dresden AG — Rev. 1.02
All rights reserved. The material contained herein may not be reproduced, adapted, merged, translated, stored, or used without
the prior written consent of the copyright owner. The information furnished in this publication is subject to changes without notice.
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