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PDF AK7782 Data sheet ( Hoja de datos )
| Número de pieza | AK7782 | |
| Descripción | Dual Audio DSP | |
| Fabricantes | AKM | |
| Logotipo |  |
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[AK7782]
AK7782
Dual Audio DSP with 24bit 5ch ADC & SRC
GENERAL DESCRIPTION
The AK7782 is an audio digital signal processor with integrated 24bit 5ch ADCs, an 8:2 stereo input
selector and sample rate converters that support 2ch inputs and the frequency up to 96kHz. The ADC
supports wide range of sampling frequency from 7.35kHz to 96kHz. Two integrated audio DSPs have
high performance processing speed of 2560step/fs (at 48kHz sampling), and two 6k-word delay RAMs
allow surround processing, time alignment adjusting and FIR filtering. As the AK7782 is a RAM based
DSP, it is programmable for various user requirements. It is housed in a 100pin LQFP package.
FEATURES
[DSP1/DSP2]
□ Word Length: 28-bits
□ Instruction Cycle Time: 8.1ns (2560fs, fs=48kHz)
□ Processing Step: 2560 steps (max) /fs= 48kHz, 44.1kHz (Normal Speed)
15360 steps (max) /fs= 8kHz, 7.35kHz
1280 steps (max) fs= 96kHz, 88.2kHz (Double Speed)
□ Multiplier: 24 x 16 → 40-bits (double precision available)
□ Divider: 24 ÷ 24 → 24-bits (floating point normalization function)
□ ALU: 44-bit arithmetic operation (with 4-bit overflow margin)
24-bit arithmetic and logic operation
□ Data Shift: Right shift after multiplication 1, 2, 4, 5, 8, 14, 15-bits
Right shift BUS 1, 2, 3, 4, 8, 14, 15-bits
Left shift after multiplication 1, 2, 3, 4, 8, 15-bits
Left shift BUS 1, 2, 3, 4, 6, 8, 15-bits
Indirect shifting function
□ Program RAM (PRAM): 2048word x 36-bits
□ Coefficient RAM (CRAM): 2048word x 16-bits
□ Data RAM (DRAM): 2048word x 28-bits
□ Offset Register (OFREG): 64word x 13-bits
□ Delay RAM (DLRAM): 168kbit (four types)
● 6kword 28-bits
● 4kword 28-bits + 4kword 14-bits
● 3kword 28-bits + 6kword 14-bits
● 3kword 28-bits + 3kword 28-bits (Linear)
□ Register: 44-bits x 4 (ACC) [for ALU]
28-bits x 12 (TMP) [DBUS connection]
28-bits x 6 steps stack (PTMP) [DBUS connection]
MS1337-E-00-PB
- 1-
2011/11
1 page  
■ Ordering Guide
AK7782VQ
AKD7782
■ Pin Layout
-40 ∼ +85°C 100pin LQFP (0.5mm pitch)
Evaluation Board for AK7782
[AK7782]
NC
AINM
AINR4
AINL4
AINR3
AINL3
AINR2
AINL2
AVDD
VREFH
VCOM
VREFL
VSS1
AINR-
AINR+
AINL-
AINR+
AINR5
AINL5
AINR6
AINL6
AINR7
AINL7
AINR8
AINL8
75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 60 59 58 57 56 55 54 53 52 51
76 50
77 49
78 48
79 47
80 46
81 45
82 44
83 43
84 42
85
86
100 pin LQFP
41
40
87 39
88
(TOP VIEW)
38
89 37
90 36
91 35
92 34
93 33
94 32
95 31
96 30
97 29
98 28
99 27
100 26
1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25
Figure 2. Pin Layout
SO
DVDD
VSS3
DVDD18
SCLK/SCL
SI/CAD0
RQN/CAD1
PDSPRSTN
PADRSTN
PCKRSTN
INITRSTN
VSS3
DVDD18
LRCLKI
BITCLKI
SDIN5
SDIN4
SDIN3
SDIN2
DVDD18
VSS3
DVDD
CLKO1
SDOUT5
SDOUT4
pin
Input
Output
I/O
Power
MS1337-E-00-PB
- 5-
2011/11
5 Page 
[AK7782]
■ Handling of Unused Pins
Unused I/O pins must be connected appropriately.
Pin Name
Analog
AINL+, AINL-, AINR+, AINR-, AINL2, AINR2, AINL3, AINR3, AINL4, AINR4,
AINL5, AINR5, AINL6, AINR6, AINL7, AINR7, AINL8, AINR8, AINM
XTO, LRCLKO, BITCLKO, SDOUT1, SDOUT2, SDOUT3, SDOUT4, SDOUT5,
CLKO1, SO, RDY, STO, SDOTUA1, SDOUT6, SDOUT7, SDA (I2CSEL= “L”)
Digital
TESTI1, SRC2LRCK, SRC2BICK, XTI, SDIN2, SDIN3, SDIN4, SDIN5,
PCKRSTN, PADRSTN, SDIN7/JX2, SDIN6/JX1, JX0, SDIN1, SRCBICK,
SRCLRCK, PSRCRSTN, PSRCSMUTE, TESTI2
Setting
Leave Open
Leave Open
Connect to VSS3
Relationship between the I2CSEL pin and the SDA
I2CSEL
Normal Microcomputer
L
Interface
I2C-bus
L
H
H
INITRSTN
L
H
L
H
SDA
L
L
“Hi-Z” → pull-up
function
MS1337-E-00-PB
- 11-
2011/11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet AK7782.PDF ] | |
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